def scan_reg_sizes(self):
"""Scan for 64-bit 'reg' properties and update the values
This finds 'reg' properties with 64-bit data and converts the value to
an array of 64-values. This allows it to be output in a way that the
C code can read.
"""
for node in self._valid_nodes:
reg = node.props.get('reg')
if not reg:
continue
num_addr, num_size = self.get_num_cells(node)
total = num_addr + num_size
if reg.type != fdt.Type.INT:
raise ValueError("Node '%s' reg property is not an int" %
node.name)
if not isinstance(reg.value, list):
reg.value = [reg.value]
if len(reg.value) % total:
raise ValueError(
"Node '%s' (parent '%s') reg property has %d cells "
'which is not a multiple of na + ns = %d + %d)' %
(node.name, node.parent.name, len(reg.value), num_addr,
num_size))
reg.num_addr = num_addr
reg.num_size = num_size
if num_addr > 1 or num_size > 1:
reg.type = fdt.Type.INT64
i = 0
new_value = []
val = reg.value
while i < len(val):
addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.num_addr)
i += num_addr
size = fdt_util.fdt_cells_to_cpu(val[i:], reg.num_size)
i += num_size
new_value += [addr, size]
reg.value = new_value
def testFdtCellsToCpu(self):
val = self.node.props['intarray'].value
self.assertEqual(0, fdt_util.fdt_cells_to_cpu(val, 0))
self.assertEqual(2, fdt_util.fdt_cells_to_cpu(val, 1))
dtb2 = fdt.FdtScan(find_dtb_file('dtoc_test_addr64.dts'))
node1 = dtb2.GetNode('/test1')
val = node1.props['reg'].value
self.assertEqual(0x1234, fdt_util.fdt_cells_to_cpu(val, 2))
node2 = dtb2.GetNode('/test2')
val = node2.props['reg'].value
self.assertEqual(0x1234567890123456, fdt_util.fdt_cells_to_cpu(val, 2))
self.assertEqual(0x9876543210987654, fdt_util.fdt_cells_to_cpu(val[2:],
2))
self.assertEqual(0x12345678, fdt_util.fdt_cells_to_cpu(val, 1))
