def configure(argList, isNeroCapable, handle, vp): if argList.p: progConfig = argList.p[0] print("Programming device with config {}...".format(progConfig)) if isNeroCapable: fl.flProgram(handle, progConfig) else: raise fl.FLException("Device program requested but device at {} does not support NeroProg".format(vp))
def configure(argList, isNeroCapable, handle, vp): """ Configures FPGA board with selected program. Args: argList(dict): dictionary with necessary args isNeroCapable(boolean): indicated if device is nero capable handle: An opaque reference to an internal structure representing the connection. vp(): vendor and product ID """ progConfig = argList['progConfig'] print("Programming device with config {}...".format(progConfig)) if isNeroCapable: fl.flProgram(handle, progConfig) else: raise fl.FLException("Device program requested but device at {} does not support NeroProg".format(vp))
def load_bitstream(self, bitstream_file): n = 27 xsvf_file = os.path.splitext(bitstream_file)[0] + ".xsvf" print("\nGenerating xsvf formatted bitstream") print("=" * n) if os.path.exists(xsvf_file): os.unlink(xsvf_file) _create_xsvf(bitstream_file, xsvf_file) print("\n" + "=" * n + "\n") print("Programming %s to device." % xsvf_file) print("=" * n) handle = self.open_device() print("Programming device...") fl.flProgram(handle, "J:" + self.pin_cfg, progFile=xsvf_file) print("Programming successful!") print("=" * n + "\n") fl.flClose(handle)
def load_bitstream(self, bitstream_file): n = 27 xsvf_file = os.path.splitext(bitstream_file)[0] + ".xsvf" print("\nGenerating xsvf formatted bitstream") print("=" * n) if os.path.exists(xsvf_file): os.unlink(xsvf_file) _create_xsvf(bitstream_file, xsvf_file) print("\n" + "=" * n + "\n") print("Programming %s to device." % xsvf_file) print("=" * n) handle = self.open_device() print("Programming device...") fl.flProgram(handle, "J:" + self.pin_cfg, progFile=xsvf_file) print("Programming successful!") print("=" * n + "\n") fl.flClose(handle)
print("Initializing FPGALink library...") fl.flInitialise(3) print("Attempting to open connection to FPGALink device {}...".format(vp)) try: handle = fl.flOpen(vp) except fl.FLException as ex: print(ex) print("Loading standard firmware into RAM {}...".format(ivp)) fl.flLoadStandardFirmware(ivp, vp) time.sleep(3) fl.flAwaitDevice(vp, 10000) print("Attempting to open connection to FPGALink device {} again...".format(vp)) handle = fl.flOpen(vp) conduit = 1 isNeroCapable = fl.flIsNeroCapable(handle) isCommCapable = fl.flIsCommCapable(handle, conduit) fl.flSelectConduit(handle, conduit) if ( isNeroCapable ): print("Programming FPGA with {}...".format(progConfig)) fl.flProgram(handle, progConfig) print("Programming successful") else: raise fl.FLException("Device does not support NeroProg") except fl.FLException as ex: print(ex) finally: fl.flClose(handle)
fl.jtagClockFSM(conn, 0x0000005F, 9) fl.spiSend(conn, BYTE_ARRAY, fl.SPI_LSBFIRST) bs = fl.spiRecv(conn, 8, fl.SPI_LSBFIRST) print("spiRecv() got {} bytes: {{\n {}\n}}".format( len(bs), " ".join(["{:02X}".format(b) for b in bs]))) fl.progClose(conn) print("jtagScanChain(): {") for idCode in fl.jtagScanChain(conn, PROG_CONFIG): print(" 0x{:08X}".format(idCode)) print("}") print("flProgram()...") fl.flProgram(conn, "J:{}:../../../../hdlmake/apps/makestuff/swled/cksum/vhdl/fpga.xsvf".format(PROG_CONFIG)) print("...done.") fl.flSelectConduit(conn, CONDUIT) print("flIsFPGARunning(): {}".format(fl.flIsFPGARunning(conn))) fl.flWriteChannel(conn, 0, BYTE_ARRAY) bs = fl.flReadChannel(conn, 1, 16) print("flReadChannel(1, 16) got {} bytes: {{\n {}\n}}".format( len(bs), " ".join(["{:02X}".format(b) for b in bs]))) print("flReadChannel(2) got {:02X}".format(fl.flReadChannel(conn, 2))) fl.flReadChannelAsyncSubmit(conn, 0, 4)
for idCode in chain: print(" 0x{:08X}".format(idCode)) else: print( "The FPGALink device at {} scanned its JTAG chain but did not find any attached devices".format(vp) ) else: raise fl.FLException( "JTAG chain scan requested but FPGALink device at {} does not support NeroJTAG".format(vp) ) if argList.p: progConfig = argList.p[0] print("Programming device with config {}...".format(progConfig)) if isNeroCapable: fl.flProgram(handle, progConfig) else: raise fl.FLException("Device program requested but device at {} does not support NeroProg".format(vp)) if argList.f and not (isCommCapable): raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp)) if isCommCapable and fl.flIsFPGARunning(handle): print("Zeroing R1 & R2...") fl.flWriteChannel(handle, 0x01, 0x00) fl.flWriteChannel(handle, 0x02, 0x00) if argList.f: dataFile = argList.f[0] print("Writing {} to FPGALink device {}...".format(dataFile, vp)) for chunk in readFile(dataFile): fl.flWriteChannelAsync(handle, 0x00, chunk)