def __init__(self, a=0, b=0, x=0, y=0):
self.a = a
self.b = b
self.x = x
self.y = y
self.nand_1 = fundamentals.Nand(self.a, self.y)
self.nand_2 = fundamentals.Nand(self.x, self.b)
return (None)
def __init__(self, d=0, clk=0, Q=0, Qbar=0):
self.d = d
self.clk = clk
self.Q = Q
self.Qbar = Qbar
self.nand_latch = NandLatch()
self.not_1 = logic_gates.Not(self.d)
self.nand_1 = fundamentals.Nand(self.d, self.clk)
self.nand_2 = fundamentals.Nand(self.clk, self.not_1.x)
return (None)
def update(self):
not_1 = logic_gates.Not(self.d)
not_1.update()
nand_1 = fundamentals.Nand(self.d, self.clk)
nand_1.update()
nand_2 = fundamentals.Nand(self.clk, not_1.x)
nand_2.update()
self.nand_latch.a = nand_1.x
self.nand_latch.b = nand_2.x
self.nand_latch.update()
self.Q = self.nand_latch.x
self.Qbar = self.nand_latch.y
return (self.Q, self.Qbar)
def update(self):
gate1 = fundamentals.Nand(self.a, self.b)
gate1.update()
gate2 = Not(gate1.x)
gate2.update()
self.x = gate2.x
return (self.x)
def __init__(self, a, b, x=0):
# Initialize member gates:
self.nand = fundamentals.Nand()
self.a = a
self.b = b
self.x = x
return (None)
def update(self):
gate1 = Not(self.a)
gate1.update()
gate2 = Not(self.b)
gate2.update()
gate3 = fundamentals.Nand(gate1.x, gate2.x)
gate3.update()
self.x = gate3.x
return (self.x)
def __init__(self, a=0, x=0):
# Initialize member gates:
self.nand = fundamentals.Nand(a=a, b=a, x=x)
# Initialize pins for this chip:
self.a = fundamentals.Pin(a)
self.x = fundamentals.Pin(x)
return (None)
or1 = logic_gates.Or(self.inc, self.load)
or1.update()
or2 = logic_gates.Or(or1.x, self.reset)
or2.update()
self.register.d16 = mux2.x16
self.register.load = or2.x
self.register.clk = self.clk
self.register.update()
self.Q16 = self.register.Q16
return (self.Q16)
if __name__ == '__main__':
my_Bit = Bit()
my_DFF = DFF()
my_Nand = fundamentals.Nand()
my_NandLatch = NandLatch()
my_PC = PC()
my_RAM4K = RAM4K()
my_RAM8 = RAM8()
my_RAM16K = RAM16K()
my_RAM64 = RAM64()
my_RAM512 = RAM512()
for ii in range(8):
for jj in range(8):
for kk in range(8):
print(my_RAM512.ram64s[ii].ram8s[jj].registers[kk].Q16)
print(
"======================================================================="
)
