def __init__(self):
Arch.__init__(self)
self.__net_devices = re.compile('^\s*(\w+):.*mtu', re.M
).findall( os.popen('/sbin/ifconfig -a').read() )
# cpu0 at mainbus0: MIPS R3000A CPU (0x230) Rev. 3.0 with MIPS R3010 FPC Rev. 3.0
# cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
# cpu0: 64KB/4B direct-mapped write-through Data cache
m = re.compile('^cpu0 at mainbus0: (.*?) CPU', re.M
).search(open("/var/run/dmesg.log").read() )
self.__model = m.group(1)
def __init__(self):
Arch.__init__(self)
self.__net_devices = re.compile('^\s*(\w+):.*mtu', re.M
).findall( os.popen('/sbin/ifconfig -a').read() )
# just get the first cpu0 line
# cpu0: Intel Celeron (Mendocino) ("GenuineIntel" 686-class, 128KB L2 cache) 468 MHz
# cpu0: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR
m = re.search('^cpu0: (.*?) \(.*?\)* (\d+) MHz$',
open("/var/run/dmesg.boot").read(),
re.MULTILINE)
self.__model = m.group(1)
self.__speed = m.group(2)
def __init__(self):
Arch.__init__(self)
self.__bogomips = re.compile('^bogomips\s+:\s+(\d+\.\d+)$', re.M)
self.__net_devices = re.compile('^\s*(\w+):.*mtu', re.M).findall(os.popen('/usr/sbin/ifconfig -a').read())
def __init__(self):
Arch.__init__(self)
self.__net_devices = re.compile('^\s*(\w+):.*mtu', re.M
).findall( os.popen('/sbin/ifconfig -a').read() )
def __init__(self):
Arch.__init__(self)
self.__bogomips = re.compile('^bogomips\s+:\s+(\d+\.\d+)$', re.M)
self.__net_devices = re.compile('^\s*(\w+):', re.M)