def __init__(self, sys_clk_freq=int(75e6), **kwargs):
platform = crosslink_nx_evn.Platform()
platform.add_platform_command(
"ldc_set_sysconfig {{MASTER_SPI_PORT=SERIAL}}")
# Disable Integrated SRAM since we want to instantiate LRAM specifically for it
kwargs["integrated_sram_size"] = 0
# Make serial_pmods available
platform.add_extension(crosslink_nx_evn.serial_pmods)
# SoCCore -----------------------------------------_----------------------------------------
SoCCore.__init__(self,
platform,
sys_clk_freq,
ident="LiteX SoC on Crosslink-NX Evaluation Board",
ident_version=True,
**kwargs)
# CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform, sys_clk_freq)
# 128KB LRAM (used as SRAM) ---------------------------------------------------------------
size = 128 * kB
self.submodules.spram = NXLRAM(32, size)
self.register_mem("sram", self.mem_map["sram"], self.spram.bus, size)
# Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser(
pads=Cat(*[platform.request("user_led", i) for i in range(14)]),
sys_clk_freq=sys_clk_freq)
self.add_csr("leds")
def __init__(self,
sys_clk_freq=int(75e6),
device="LIFCL-40-9BG400C",
toolchain="radiant",
with_led_chaser=True,
**kwargs):
platform = crosslink_nx_evn.Platform(device=device,
toolchain=toolchain)
# Disable Integrated SRAM since we want to instantiate LRAM specifically for it
kwargs["integrated_sram_size"] = 0
# Make serial_pmods available
platform.add_extension(crosslink_nx_evn.serial_pmods)
# SoCCore -----------------------------------------_----------------------------------------
SoCCore.__init__(self,
platform,
sys_clk_freq,
ident="LiteX SoC on Crosslink-NX Evaluation Board",
ident_version=True,
**kwargs)
# CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform, sys_clk_freq)
# 128KB LRAM (used as SRAM) ---------------------------------------------------------------
size = 128 * kB
self.submodules.spram = NXLRAM(32, size)
self.register_mem("sram", self.mem_map["sram"], self.spram.bus, size)
# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
self.submodules.leds = LedChaser(
pads=Cat(*[platform.request("user_led", i)
for i in range(14)]),
sys_clk_freq=sys_clk_freq)