def __init__(self,
dc_number,
fpga_load,
num_channels,
is_positive_clock,
num_bits,
alignment,
is_bipolar,
spi_reg_values=[],
verbose=False):
self.vprint = funcs.make_vprint(verbose)
self.num_bits = num_bits
self.alignment = alignment
self.is_bipolar = is_bipolar
self.num_channels = num_channels
if alignment > 16:
self.bytes_per_sample = 4
else:
self.bytes_per_sample = 2
controller_info = funcs.get_controller_info_by_eeprom(
TYPE_DC890, dc_number, DC890_EEPROM_SIZE, self.vprint)
self.controller = comm.Controller(controller_info)
is_multichannel = num_channels > 1
self.init_controller(fpga_load, is_multichannel, is_positive_clock)
self.set_spi_registers(spi_reg_values)
def _connect(self):
# Open communication to the demo board
self.vprint("Looking for Controller")
for info in comm.list_controllers(consts.TYPE_HIGH_SPEED):
description = info.get_description()
if self.expected_description in description:
self.vprint("Found a possible setup")
self.controller = comm.Controller(info)
return
raise (errs.HardwareError('Could not find a compatible device'))
def get_controller_info_by_eeprom(controller_type, dc_number, eeprom_id_size,
vprint):
# find demo board with correct ID
vprint('Looking for a controller board')
info_list = comm.list_controllers(controller_type)
if info_list is None:
raise (err.HardwareError('No controller boards found'))
for info in comm.list_controllers(controller_type):
with comm.Controller(info) as controller:
eeprom_id = controller.eeprom_read_string(eeprom_id_size)
if dc_number in eeprom_id:
vprint('Found the ' + dc_number + ' demoboard')
return info
raise (err.HardwareError('Could not find a compatible device'))
def __init__(self,
dc_number,
is_positive_clock,
num_bits,
alignment,
is_bipolar,
verbose=False):
self.vprint = funcs.make_vprint(verbose)
self.num_bits = num_bits
self.alignment = alignment
self.is_bipolar = is_bipolar
if alignment > 16:
self.bytes_per_sample = 3
else:
self.bytes_per_sample = 2
controller_info = funcs.get_controller_info_by_eeprom(
TYPE_DC718, dc_number, DC718_EEPROM_SIZE, self.vprint)
self.controller = comm.Controller(controller_info)
self.init_controller(self.bytes_per_sample, is_positive_clock)
def __init__(self,
dc_number,
fpga_load,
num_channels,
num_bits,
alignment,
is_bipolar,
demo_config,
spi_reg_values=[],
verbose=False):
self.vprint = funcs.make_vprint(verbose)
self.num_bits = num_bits
self.alignment = alignment
self.is_bipolar = is_bipolar
self.num_channels = num_channels
self.fpga_load = fpga_load
controller_info = funcs.get_controller_info_by_eeprom(
TYPE_DC1371, dc_number, DC1371_EEPROM_SIZE, self.vprint)
self.controller = comm.Controller(controller_info)
self._init_controller(demo_config, spi_reg_values)
def test():
print "Use an FT2232H mini-module with:"
print "CN2-5 connected to CN2-11"
print "CN3-1 connected to CN3-3"
print "CN3-17 connected to CN3-24"
raw_input("Press Enter to continue...")
controller_info = None
for info in lcc.list_controllers(lcc.TYPE_HIGH_SPEED):
if info.get_description() == "LTC Communication Interface":
controller_info = info
break
if controller_info is None:
raise RuntimeError("could not find compatible device")
print "Found Mini-module:"
print "Description: ", controller_info.get_description()
print "Serial Number: ", controller_info.get_serial_number()
# open and use the device
with lcc.Controller(controller_info) as controller:
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_MPSSE)
controller.hs_gpio_write_high_byte(0x01)
if controller.spi_receive_bytes(end=1)[0] != 0xFF:
raise RuntimeError("spi_receive_bytes_didn't seem to work")
controller.hs_gpio_write_high_byte(0x00)
if controller.spi_receive_bytes(end=1)[0] != 0x00:
raise RuntimeError("spi_receive_bytes_didn't seem to work")
print "spi_receive_bytes is OK"
controller.hs_gpio_write_high_byte(0x01)
if (controller.hs_gpio_read_low_byte() & 0x04) == 0:
raise RuntimeError("gpio_read_low_byte didn't seem to work")
controller.hs_gpio_write_high_byte(0x00)
if (controller.hs_gpio_read_low_byte()) & 0x04 != 0:
raise RuntimeError("gpio_read_low_byte didn't seem to work")
print "gpio_read_low_byte is OK"
def test():
print 'Use an LTC2261 setup.'
raw_input("Press Enter to continue...")
controller_info = None
for info in lcc.list_controllers(lcc.TYPE_DC890):
with lcc.Controller(info) as controller:
eeprom_id = controller.eeprom_read_string(EEPROM_ID_SIZE)
if 'LTC2261' in eeprom_id:
controller_info = info
break
if controller_info is None:
raise Exception("could not find compatible device")
print "Found LTC2261 demo board:"
# open and use the device
with lcc.Controller(controller_info) as controller:
controller.dc890_gpio_set_byte(0xF8)
controller.dc890_gpio_spi_set_bits(3, 0, 1)
controller.spi_send_byte_at_address(0x00, 0x80)
controller.spi_send_byte_at_address(0x01, 0x00)
controller.spi_send_byte_at_address(0x02, 0x00)
controller.spi_send_byte_at_address(0x03, 0x71)
controller.spi_send_bytes([0x04, 0x28])
if not controller.fpga_get_is_loaded('DLVDS'):
controller.fpga_load_file('DLVDS')
controller.data_set_characteristics(True, 2, True)
collect_and_check(controller)
print 'Please disconnect the clock.'
raw_input("Press Enter to continue...")
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
if (controller.data_is_collect_done()):
raise lcc.HardwareError('Collect completed without clock')
controller.data_cancel_collect()
print 'Please reconnect the clock'
raw_input("Press Enter to continue...")
collect_and_check(controller)
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
for i in range(10):
if controller.data_is_collect_done():
break
time.sleep(0.2)
controller.dc890_flush()
total_bytes = 0
data = []
while total_bytes < NUM_ADC_SAMPLES * 2:
end_val = min(1001, NUM_ADC_SAMPLES - total_bytes / 2)
num_bytes, data_sub = controller.data_receive_uint16_values(
end=end_val)
data += data_sub
total_bytes += num_bytes
codes = [0x2AAA, 0x1555]
code_index = 1
if (data[0] & 0x3FFF) == codes[0]:
code_index = 0
for i in xrange(0, NUM_ADC_SAMPLES, 2):
if (data[i] & 0x3FFF) != codes[code_index]:
raise lcc.HardwareError('Data values not correct')
code_index ^= 1
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
for i in range(10):
if controller.data_is_collect_done():
break
time.sleep(0.2)
controller.dc890_flush()
controller.data_receive_uint16_values(end=1000)
controller.data_cancel_collect()
collect_and_check(controller)
controller.fpga_load_file_chunked('S1407')
controller.fpga_cancel_load()
controller.fpga_load_file('DCMOS')
if not controller.fpga_get_is_loaded('DCMOS'):
raise lcc.HardwareError('FPGA load failed')
while ((runs < 1 or continuous == True) and runs_with_errors < 100000):
runs += 1
# if(verbose != 0):
print "LTC2123 Interface Program"
print "Run number: " + str(runs)
print "\nRuns with errors: " + str(runs_with_errors) + "\n"
if (runs_with_uncaught_errors > 0):
print "***\n***\n***\n*** UNCAUGHT error count: " + str(runs_with_uncaught_errors) + \
"!\n***\n***\n***\n"
################################################
# Configuration Flow Step 6: Issue Reset Pulse
################################################
with comm.Controller(device_info) as device:
device.hs_set_bit_mode(consts.HS_BIT_MODE_MPSSE)
if do_reset:
device.hs_fpga_toggle_reset()
################################################
# Configuration Flow Step 7, 8:
# Check ID and Clock Status register
################################################
id = device.hs_fpga_read_data_at_address(
funcs.ID_REG) # Read FPGA ID register
if (verbose != 0):
funcs.bitfile_id_warning(bitfile_id, id)
print "Dumping readable FPGA registers"
data = device.hs_fpga_read_data_at_address(
def test():
print 'Use an LTC2123 setup.'
raw_input("Press Enter to continue...")
controller_info = None
for info in lcc.list_controllers(lcc.TYPE_HIGH_SPEED):
if info.get_description() == "LTC Communication Interface":
controller_info = info
break
if controller_info is None:
raise RuntimeError("could not find compatible device")
print "Found LTC2123 demo board:"
print "Description: ", controller_info.get_description()
print "Serial Number: ", controller_info.get_serial_number()
# open and use the device
with lcc.Controller(controller_info) as controller:
spi_write = lambda reg, val: controller.spi_send_byte_at_address(reg | SPI_WRITE_BIT, val)
spi_read = lambda reg: controller.spi_receive_byte_at_address(reg | SPI_READ_BIT)
controller.data_set_low_byte_first()
init_adc(controller, spi_write)
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
num_bytes, data = controller.data_receive_uint16_values(end=NUM_ADC_SAMPLES)
if num_bytes != NUM_ADC_SAMPLES * 2:
raise RuntimeError("didn't receive all bytes")
channel_a = []
channel_b = []
for i in xrange(0, NUM_ADC_SAMPLES / 2, 2):
channel_a.append(data[2 * i])
channel_a.append(data[2 * i + 1])
channel_b.append(data[2 * i + 2])
channel_b.append(data[2 * i + 3])
if not check_prbs(channel_a):
raise RuntimeError("data_receive_uint16_values didn't seem to work")
if not check_prbs(channel_b):
raise RuntimeError("data_receive_uint16_values didn't seem to work")
print "data_receive_uint16_values is OK"
init_adc(controller, spi_write)
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
num_bytes, data = controller.data_receive_uint32_values(end=NUM_ADC_SAMPLES / 2)
if num_bytes != NUM_ADC_SAMPLES * 2:
raise RuntimeError("didn't receive all bytes")
channel_a = []
channel_b = []
for i in xrange(0, NUM_ADC_SAMPLES / 2, 2):
two_samples = struct.pack('L', data[i])
channel_a.append(struct.unpack('H', two_samples[0:2])[0])
channel_a.append(struct.unpack('H', two_samples[2:4])[0])
two_samples = struct.pack('L', data[i + 1])
channel_b.append(struct.unpack('H', two_samples[0:2])[0])
channel_b.append(struct.unpack('H', two_samples[2:4])[0])
if not check_prbs(channel_a):
raise RuntimeError("data_receive_uint32_values didn't seem to work")
if not check_prbs(channel_b):
raise RuntimeError("data_receive_uint32_values didn't seem to work")
print "data_receive_uint32_values is OK"
init_adc(controller, spi_write)
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
num_bytes, data = controller.data_receive_bytes(end=NUM_ADC_SAMPLES * 2)
if num_bytes != NUM_ADC_SAMPLES * 2:
raise RuntimeError("didn't receive all bytes")
channel_a = []
channel_b = []
for i in xrange(0, NUM_ADC_SAMPLES / 2, 2):
byte_array = bytearray(data[(4 * i):(4 * i + 8)])
channel_a.append(struct.unpack('H', byte_array[0:2])[0])
channel_a.append(struct.unpack('H', byte_array[2:4])[0])
channel_b.append(struct.unpack('H', byte_array[4:6])[0])
channel_b.append(struct.unpack('H', byte_array[6:8])[0])
if not check_prbs(channel_a):
raise RuntimeError("data_receive_bytes didn't seem to work")
if not check_prbs(channel_b):
raise RuntimeError("data_receive_bytes didn't seem to work")
print "data_receive_bytes is OK"
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_MPSSE)
controller.hs_fpga_toggle_reset()
id_str = controller.eeprom_read_string(MAX_EEPROM_CHARS)
if (id_str[0:len(LTC2123_ID_STRING)] != LTC2123_ID_STRING):
raise RuntimeError("fpga_eeprom_receive_string didn't seem to work.")
print "fpga_eeprom_receive_string is OK"
controller.hs_fpga_write_data_at_address(0x00, 0x00)
controller.hs_fpga_eeprom_set_bit_bang_register(0x00)
try:
controller.eeprom_read_string(1)
except:
pass # we expect this to throw an error
if controller.hs_fpga_read_data_at_address(0x00) == 0:
raise RuntimeError("fpga_eeprom_set_bitbang_register didn't seem to work")
print "fpga_i2c_set_bitbang_register is OK"
def test():
print 'Use an LTC2000 setup and a scope.'
raw_input("Press Enter to continue...")
controller_info = None
for info in lcc.list_controllers(lcc.TYPE_HIGH_SPEED):
if "LTC2000" in info.get_description():
controller_info = info
break
if controller_info is None:
raise Exception("could not find compatible device")
print "Found LTC2000 demo board:"
print "Description: ", controller_info.get_description()
print "Serial Number: ", controller_info.get_serial_number()
# open and use the device
with lcc.Controller(controller_info) as controller:
spi_write = lambda reg, val: controller.spi_send_byte_at_address(
reg | SPI_WRITE_BIT, val)
spi_read = lambda reg: controller.spi_receive_byte_at_address(
reg | SPI_READ_BIT)
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_MPSSE)
controller.hs_fpga_toggle_reset()
print "FPGA ID is ", format(
controller.hs_fpga_read_data_at_address(FPGA_ID_REG), "2X")
controller.hs_fpga_write_data_at_address(FPGA_DAC_PD, 1)
spi_write(REG_RESET_PD, 0x00)
spi_write(REG_RESET_PD, 0x00)
spi_write(REG_CLK_PHASE, 0x05)
spi_write(REG_PORT_EN, 0x0B)
spi_write(REG_SYNC_PHASE, 0x00)
spi_write(REG_LINEAR_GAIN, 0x00)
spi_write(REG_LINEARIZATION, 0x08)
spi_write(REG_DAC_GAIN, 0x20)
spi_write(REG_LVDS_MUX, 0x00)
spi_write(REG_TEMP_SELECT, 0x00)
spi_write(REG_PATTERN_ENABLE, 0x00)
if spi_read(REG_RESET_PD) & 0xCF != 0x00:
raise RuntimeError("Error reading SPI register ",
format(REG_RESET_PD, "2X"))
if spi_read(REG_CLK_PHASE) != 0x07:
raise RuntimeError("Error reading SPI register ",
format(REG_CLK_PHASE, "2X"))
if spi_read(REG_PORT_EN) != 0x0B:
raise RuntimeError("Error reading SPI register ",
format(REG_PORT_EN, "2X"))
if spi_read(REG_SYNC_PHASE) & 0xFC != 0x00:
raise RuntimeError("Error reading SPI register ",
format(REG_SYNC_PHASE, "2X"))
if spi_read(REG_LINEAR_GAIN) != 0x00:
raise RuntimeError("Error reading SPI register ",
format(REG_LINEAR_GAIN, "2X"))
if spi_read(REG_LINEARIZATION) != 0x08:
raise RuntimeError("Error reading SPI register ",
format(REG_LINEARIZATION, "2X"))
if spi_read(REG_DAC_GAIN) != 0x20:
raise RuntimeError("Error reading SPI register ",
format(REG_DAC_GAIN, "2X"))
controller.hs_fpga_write_data_at_address(FPGA_CONTROL_REG, 0x20)
controller.data_set_high_byte_first()
data = [
int(AMPLITUDE * math.sin(
(NUM_CYCLES_1 * TWO_PI * d) / NUM_DAC_SAMPLES))
for d in range(NUM_DAC_SAMPLES)
]
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
if controller.data_send_uint16_values(data) != NUM_DAC_SAMPLES * 2:
raise RuntimeError("Not all samples sent")
print "Do you see a sine wave in the scope with frequency = clock_frequency / ", \
NUM_DAC_SAMPLES / NUM_CYCLES_1, "?"
response = raw_input("(y = yes, n = no)")
if response[0] != 'y':
raise RuntimeError("User indicates output is invalid")
print "user indicates output is valid"
print "list_controllers is OK"
print "constructor OK"
print "hs_set_bit_mode is OK"
print "hs_fpga_toggle_reset is OK"
print "hs_fpga_read_data_at_address is OK"
print "hs_fpga_write_data_at_address is OK"
print "spi_send_byte_at_address is OK"
print "spi_receive_byte_at_address is OK"
print "data_set_high_byte_first is OK"
print "data_send_uint16_values is OK"
reset_fpga(controller)
data = [AMPLITUDE * math.sin((NUM_CYCLES_2 * TWO_PI * d) / NUM_DAC_SAMPLES) \
for d in range(NUM_DAC_SAMPLES)]
data32 = []
for i in xrange(NUM_DAC_SAMPLES / 2):
h1 = struct.pack('h', data[2 * i])
h2 = struct.pack('h', data[2 * i + 1])
bytes = h2[1] + h2[0] + h2[1] + h1[0]
i32 = struct.unpack('I', bytes)[0]
data32.append(i32)
controller.data_set_low_byte_first()
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
if controller.data_send_uint32_values(data32) != NUM_DAC_SAMPLES * 2:
raise RuntimeError("Not all samples sent")
print "Do you see a sine wave in the scope with frequency = clock_frequency / ", \
NUM_DAC_SAMPLES / NUM_CYCLES_2, "?"
response = raw_input("(y = yes, n = no)")
if response[0] != 'y':
raise RuntimeError("User indicates output is invalid")
print "user indicates output is valid"
print "data_set_low_byte_first is OK"
print "data_send_uint32_values is OK"
reset_fpga(controller)
data = [AMPLITUDE * math.sin((NUM_CYCLES_3 * TWO_PI * d) / NUM_DAC_SAMPLES) \
for d in range(NUM_DAC_SAMPLES)]
data8 = []
for i in xrange(NUM_DAC_SAMPLES):
bytes = struct.pack('h', data[i])
data8.append(struct.unpack('B', bytes[1])[0])
data8.append(struct.unpack('B', bytes[0])[0])
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_FIFO)
if controller.data_send_bytes(data8) != NUM_DAC_SAMPLES * 2:
raise RuntimeError("Not all samples sent")
print "Do you see a sine wave in the scope with frequency = clock_frequency / ", \
NUM_DAC_SAMPLES / NUM_CYCLES_3, "?"
response = raw_input("(y = yes, n = no)")
if response[0] != 'y':
raise RuntimeError("User indicates output is invalid")
print "user indicates output is valid"
print "data_send_uint8_values is OK"
controller.hs_set_bit_mode(lcc.HS_BIT_MODE_MPSSE)
controller.spi_send_bytes([REG_LINEAR_GAIN | SPI_WRITE_BIT, 0x02])
if spi_read(REG_LINEAR_GAIN) != 0x02:
raise RuntimeError("spi_send_bytes didn't seem to work")
print "spi_send_bytes is OK"
controller.spi_transceive_bytes(
[REG_LINEAR_GAIN | SPI_WRITE_BIT, 0x04])
if controller.spi_transceive_bytes(
[REG_LINEAR_GAIN | SPI_READ_BIT, 0x00])[1] != 0x04:
raise RuntimeError("spi_transceive_bytes didn't seem to work")
print "spi_transceive_bytes is OK"
controller.spi_send_bytes_at_address(REG_LINEAR_GAIN | SPI_WRITE_BIT,
[6])
if spi_read(REG_LINEAR_GAIN) != 6:
raise RuntimeError("spi_send_bytes_at_address didn't seem to work")
print "spi_bytes_at_address is OK"
if controller.spi_receive_bytes_at_address(
REG_LINEAR_GAIN | SPI_READ_BIT, end=1)[0] != 6:
raise RuntimeError(
"spi_receive_bytes_at_address didn't seem to work")
print "spi_receive_bytes_at_address is OK"
controller.spi_set_cs_state(lcc.SPI_CS_STATE_LOW)
controller.spi_send_no_chip_select(
[REG_LINEAR_GAIN | SPI_WRITE_BIT, 0x08])
controller.spi_set_cs_state(lcc.SPI_CS_STATE_HIGH)
if spi_read(REG_LINEAR_GAIN) != 0x08:
raise RuntimeError(
"spi_set_chip_select or spi_send_no_chip_select didn't seem to work"
)
print "spi_set_chip_select is OK"
print "spi_send_no_chip_select is OK"
controller.spi_set_cs_state(lcc.SPI_CS_STATE_LOW)
controller.spi_send_no_chip_select([REG_LINEAR_GAIN | SPI_READ_BIT, 0])
value = controller.spi_receive_no_chip_select(end=1)[0]
controller.spi_set_cs_state(lcc.SPI_CS_STATE_HIGH)
if value != 0x08:
raise RuntimeError(
"spi_receive_no_chip_select didn't seem to work")
print "spi_receive_no_chip_select is OK"
controller.spi_set_cs_state(lcc.SPI_CS_STATE_LOW)
controller.spi_transceive_no_chip_select(
[REG_LINEAR_GAIN | SPI_WRITE_BIT, 0x0A])
controller.spi_set_cs_state(lcc.SPI_CS_STATE_HIGH)
controller.spi_set_cs_state(lcc.SPI_CS_STATE_LOW)
values = controller.spi_transceive_no_chip_select(
[REG_LINEAR_GAIN | SPI_READ_BIT, 0])
controller.spi_set_cs_state(lcc.SPI_CS_STATE_HIGH)
if values[1] != 0x0A:
raise RuntimeError(
"spi_transceive_no_chip_select didn't seem to work")
print "spi_transceive_no_chip_select is OK"
controller.hs_fpga_write_address(FPGA_ID_REG)
controller.hs_fpga_write_data(92)
if controller.hs_fpga_read_data_at_address(FPGA_ID_REG) != 92:
raise RuntimeError(
"fpga_write_address or fpga_write_data didn't seem to work")
print "fpga_write_address is OK"
print "fpga_write_data is OK"
controller.hs_fpga_write_data(37)
if controller.hs_fpga_read_data() != 37:
raise RuntimeError("fpga_read_data didn't seem to work")
print "fpga_read_data is OK"
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE)
controller.hs_gpio_write_high_byte(56)
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE | FPGA_ACTION_BIT)
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE)
if controller.hs_fpga_read_data() != 56:
raise RuntimeError(
"gpio_write_low_byte or gpio_write_high_byte didn't seem to work"
)
print "gpio_write_low_byte is OK"
print "gpio_write_high_byte is OK"
controller.hs_fpga_write_data(72)
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE | FPGA_READ_WRITE_BIT)
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE | FPGA_READ_WRITE_BIT
| FPGA_ACTION_BIT)
value = controller.hs_gpio_read_high_byte()
controller.hs_gpio_write_low_byte(GPIO_LOW_BASE)
if value != 72:
raise RuntimeError("gpio_read_high_byte didn't seem to work")
print "gpio_read_high_byte is OK"
if controller.get_description() != controller_info.get_description():
raise RuntimeError("get_description didn't seem to work")
print "get_description is OK"
if controller.get_serial_number() != controller_info.get_serial_number(
):
raise RuntimeError("get_serial_number didn't seem to work")
print "get_serial_number is OK"
controller.data_send_bytes([0x80])
controller.hs_purge_io()
if controller.data_receive_bytes(end=1)[0] != 0:
raise RuntimeError("purge_io didn't seem to work")
print "purge_io is OK"
controller.close()
with lcc.Controller(controller_info) as stolen_controller:
stolen_controller.hs_fpga_read_data_at_address(FPGA_ID_REG)
close_ok = False
error_ok = False
try:
controller.hs_fpga_read_data_at_address(FPGA_ID_REG)
except Exception as e:
close_ok = True
if e.message == "Error opening device by index (FTDI error code: DEVICE_NOT_OPENED)":
error_ok = True
if not close_ok:
raise RuntimeError("close didn't seem to work")
if not error_ok:
raise RuntimeError("get_error_info didn't seem to work")
print "close is OK"
controller.hs_fpga_read_data_at_address(FPGA_ID_REG)
print "with cleanup is OK"
def test():
print 'Use an LTC2268 setup.'
raw_input("Press Enter to continue...")
controller_info = None
for info in lcc.list_controllers(lcc.TYPE_DC1371):
with lcc.Controller(info) as controller:
eeprom_id = controller.eeprom_read_string(EEPROM_ID_SIZE)
if 'LTC2268' in eeprom_id:
controller_info = info
break
if controller_info is None:
raise Exception("could not find compatible device")
print "Found LTC2268 demo board:"
# open and use the device
with lcc.Controller(controller_info) as controller:
controller.reset()
controller.spi_send_byte_at_address(0x00, 0x80)
controller.spi_send_byte_at_address(0x01, 0x00)
controller.spi_send_byte_at_address(0x02, 0x00)
controller.spi_send_byte_at_address(0x03, 0xAA)
controller.spi_send_byte_at_address(0x04, 0xAA)
if not controller.fpga_get_is_loaded('S2175'):
controller.fpga_load_file('S2175')
controller.dc1371_set_demo_config(0x28000000)
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
read_and_check(controller, 0x2AAA)
# print 'Please disconnect the clock'
# raw_input('Press Enter to continue...')
# controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
# if controller.data_is_collect_done():
# raise lcc.HardwareError('collect finished with no clock')
# controller.data_cancel_collect()
# print 'Please reconnect the clock'
# raw_input('Press Enter to continue...')
controller.spi_send_byte_at_address(0x03, 0xAA)
controller.spi_send_byte_at_address(0x04, 0xBB)
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
read_and_check(controller, 0x2ABB)
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
for i in range(10):
if controller.data_is_collect_done():
is_done = True
break
time.sleep(0.2)
if not is_done:
raise lcc.HardwareError('Data collect timed out.')
controller.data_receive_uint16_values(end=1024)
controller.data_cancel_collect()
controller.spi_send_byte_at_address(0x03, 0xAA)
controller.spi_send_byte_at_address(0x04, 0xCC)
controller.data_start_collect(NUM_ADC_SAMPLES, lcc.TRIGGER_NONE)
read_and_check(controller, 0x2ACC)
controller.fpga_load_file_chunked('S2157')
controller.fpga_cancel_load()
controller.fpga_load_file('S2195')
if not controller.fpga_get_is_loaded('S2195'):
raise lcc.HardwareError('FPGA load failed')