from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Calculate the baseline
makeConfigs("baseline",
{},
{}
)
# Run tests
runBenchmarksOnTestSets(["baseline"])
# Retrieve results
extractDataFromResults(["sim_IPC"], ["baseline"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# il1 and dl1 cache block size are fixed at ifqize * 8
il1_1way = ["il1:%s:8:1:l" %x for x in [1024,2048,4096,8192]]
il1_2way = ["il1:%s:8:2:l" %(x/2) for x in [1024,2048,4096,8192]]
il1_4way = ["il1:%s:8:4:l" %(x/4) for x in [1024,2048,4096,8192]]
# ul2 block size must be il1 * 2
dl2_1way = ["dl2:%s:16:1:l" %(x) for x in [4096,8192,16384,32768,65536]]
dl2_2way = ["dl2:%s:16:2:l" %(x/2) for x in [4096,8192,16384,32768,65536]]
dl2_4way = ["dl2:%s:16:4:l" %(x/4) for x in [4096,8192,16384,32768,65536]]
dl2_8way = ["dl2:%s:16:8:l" %(x/8) for x in [4096,8192,16384,32768,65536]]
dl2_16way = ["dl2:%s:16:16:l" %(x/16) for x in [4096,8192,16384,32768,65536]]
makeConfigs("ex_BT_bimod_static",
{'cache:il1': il1_1way + il1_2way + il1_4way,
'cache:dl2': dl2_1way + dl2_2way + dl2_4way + dl2_8way + dl2_16way},
{'bpred': 'bimod'},
{'static': [1,2,4], 'dynamic': []}
)
# Run tests
runBenchmarksOnTestSets(["ex_BT_bimod_static"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ex_BT_bimod_static"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Calculate the baseline
makeConfigs("baseline_optimal_bpred_ras",
{'bpred': ['2lev', 'comb', 'bimod'], 'bpred:ras': [8,16]},
{},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["baseline_optimal_bpred_ras"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["baseline_optimal_bpred_ras"])
# blocks:
# int: 128
# fp: 64, 128
# ways:
# int: 2, 4
# fp: 2, (4)
makeConfigs("optimal_final_cache_static",
{
'fetch:ifqsize': [4,8,16], # Only certain that ifqsize > 1
'cache:il1': il1,
'cache:dl2': ul2
},
{
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
'fetch:speed': 2 # Minimal impact
},
{
'static' : [1,2,4],
'dynamic' : []
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["optimal_final_cache_static"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["optimal_final_cache_static"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Test how the integer ALU / mult affect geometric means
makeConfigs("ialu_imult_memport",
{'res:ialu': range(1,9), 'res:imult': range(1,9), 'res:memport': [1,2]},
{}
)
# Run tests
#runBenchmarksOnTestSets(["ialu_imult_memport"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ialu_imult_memport"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
il1 = ["il1:%s:%s:%s:l" %(x,(y*8),z) for x in [1024,2048,4096,8192] for y in [1,2] for z in [1,2,4]]
makeConfigs("optimal_cache_L1_ifqsize_smaller",
{
'fetch:ifqsize': [1,2], # Only certain that ifqsize > 1,2
'cache:il1': il1,
'cache:dl2': ["ul2:1024:128:2:l"]
},
{
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
'fetch:speed': 2 # Minimal impact
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["optimal_cache_L1_ifqsize_smaller"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["optimal_cache_L1_ifqsize_smaller"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Calculate the baseline
makeConfigs("baseline_optimal",
{},
{},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["baseline_optimal"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["baseline_optimal"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
makeConfigs("ruu_lsq",
{'ruu:size': [4,8,16,32,64], 'lsq:size': [2,4,8,16,32]},
{},
{'static': [], 'dynamic': [2,4,8]}
)
# Run tests
#runBenchmarksOnTestSets(["ruu_lsq"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ruu_lsq"])
fetchspeed = [3,4]
# int:
fetchspeed = [1,2,3,4]
makeConfigs("dyn2_int_opt_hardware",
{
'cache:il1': il1,
'cache:dl2': ul2,
#'fetch:speed': fetchspeed,
'res:fpalu': range(1,9),
'res:fpmult': range(1,9),
'res:memport': [1,2],
'res:ialu': range(1,9),
'res:imult': range(1,9),
},
{
'fetch:ifqsize': 8,
'fetch:speed': 3,
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
},
{
'static' : [],
'dynamic' : [2]
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["dyn2_int_opt_hardware"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
btb = ["%s %s" %(x,y) for y in [1,2,4]for x in [512,1024]]
# Calculate the baseline
makeConfigs("ex_baseline_optimal_with_bpred_RAS_BTB",
{'bpred': ['2lev', 'comb', 'bimod'],
'bpred:ras': range(0,17),
'bpred:btb': btb
},
{},
useOptimal = True
)
# Run tests
runBenchmarksOnTestSets(["ex_baseline_optimal_with_bpred_RAS_BTB"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ex_baseline_optimal_with_bpred_RAS_BTB"])
fetchspeed = [3,4]
# int:
fetchspeed = [1,2,3,4]
makeConfigs("dyn4_opt_hardware_high_range",
{
'cache:il1': il1,
'cache:dl2': ul2,
#'fetch:speed': fetchspeed,
'res:fpalu': range(4,9),
'res:fpmult': range(4,9),
'res:ialu': range(4,9),
'res:imult': range(4,9),
},
{
'res:memport': 2, # Safe assumption? To be tested
'fetch:ifqsize': 8, # Near certain
'fetch:speed': 3, # To be tested
'bpred': 'comb', # Certain
'bpred:ras': 8, # To be tested
},
{
'static' : [],
'dynamic' : [4]
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["dyn4_opt_hardware_high_range"])
# All possible L1 caches, LRU
#il1 = ["il1:%s:%s:%s:l" %(x,(y*8),z) for x in [256,512,1024,2048,4096,8192] for y in [1,2,4,8,16] for z in [1,2,4]]
#dl1 = ["dl1:%s:%s:%s:l" %(x,(y*8),z) for x in [256,512,1024,2048,4096,8192] for y in [1,2,4,8,16] for z in [1,2,4]]
# All possible L2 caches, LRU
ul2 = ["ul2:%s:%s:%s:l" %(x,(y*8),z) for x in [256,512,1024,2048,4096,8192,16384,32768,65536] for y in [2,4,8,16] for z in [1,2,4,8,16]]
makeConfigs("optimal_L2_cache",
{
#'fetch:ifqsize': [2,4,8,16], # Only certain that ifqsize > 1
#'cache:il1': il1,
#'cache:dl1': dl1,
'cache:dl2': ul2
},
{
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
'fetch:speed': 2 # Minimal impact
},
{
'static' : [],
'dynamic' : [2]
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["optimal_L2_cache"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["optimal_L2_cache"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Test how the integer ALU / mult affect geometric means
makeConfigs("fpalu_fpmult_memport",
{'res:fpalu': range(1,9), 'res:fpmult': range(1,9), 'res:memport': [1,2]},
{}
)
# Run tests
#runBenchmarksOnTestSets(["fpalu_fpmult_memport"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["fpalu_fpmult_memport"])
import sys
sys.path.append('../')
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# Test how the mem:width affect geometric means
makeConfigs("mem_width",
{'mem:width': [8,16]},
{}
)
# Run tests
#runBenchmarksOnTestSets(["mem_width"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["mem_width"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# ['itlb:256:4096:1:l', 'itlb:128:4096:2:l', 'itlb:64:4096:4:l', 'itlb:32:4096:8:l', 'itlb:16:4096:16:l', 'itlb:8:4096:32:l', 'itlb:4:4096:64:l', 'itlb:2:4096:128:l', 'itlb:1:4096:256:l']
itlb = ["itlb:%s:4096:%s:l" %(int(256/(2**x)), 2**x) for x in range(0,9) ]
# ['dtlb:512:4096:1:l', 'dtlb:256:4096:2:l', 'dtlb:128:4096:4:l', 'dtlb:64:4096:8:l', 'dtlb:32:4096:16:l', 'dtlb:16:4096:32:l', 'dtlb:8:4096:64:l', 'dtlb:4:4096:128:l', 'dtlb:2:4096:256:l', 'dtlb:1:4096:512:l']
dtlb = ["dtlb:%s:4096:%s:l" %(int(512/(2**x)), 2**x) for x in range(0,10) ]
makeConfigs("ex_tlb",
{ 'tlb:itlb': itlb, 'tlb:dtlb': dtlb },
{}
)
# Run tests
runBenchmarksOnTestSets(["ex_tlb"])
# Retrieve results
# extractDataFromResults(["sim_IPC"], ["ex_tlb"])
#il1 = ["il1:%s:%s:%s:l" %(x,(y*8),z) for x in [256,512,1024,2048] for y in [4,8] for z in [1,2]]
il1 = ["il1:%s:%s:%s:l" %(x,(y*8),z) for x in [512,1024,2048] for y in [4,8] for z in [1]]
# After reviewing initial L2 results
#ul2 = ["ul2:%s:%s:%s:l" %(x,(y*8),z) for x in [2048,4096,8192] for y in [8,16] for z in [2,4]]
ul2 = ["ul2:%s:%s:%s:l" %(x,(y*8),z) for x in [4096,8192] for y in [8,16] for z in [2,4]]
makeConfigs("dyn2_fp_opt_processor_params",
{
'fetch:ifqsize': [4,8], # Only certain that ifqsize > 1
'cache:il1': il1,
'cache:dl2': ul2,
'fetch:speed': [1,2,3,4],
'decode:width': [1,2,4,8]
},
{
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
},
{
'static' : [],
'dynamic' : [2]
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["dyn2_fp_opt_processor_params"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["dyn2_fp_opt_processor_params"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# il1 and dl1 cache block size are fixed at ifqize * 8
il1 = ["il1:%s:%s:1:l" %(int(1024/x),x*8) for x in [1,2,4,8,16]]
dl1 = ["dl1:%s:%s:1:l" %(int(1024/x),x*8) for x in [1,2,4,8,16]]
makeConfigs("ex_ifq_speed_decode",
{'fetch:ifqsize': [1,2,4,8,16], 'fetch:speed': range(1,5), 'decode:width': [1,2,4,8,16],
'cache:il1': il1,
'cache:dl1': dl1
},
{}
)
# Run tests
runBenchmarksOnTestSets(["ex_ifq_speed_decode"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ex_ifq_speed_decode"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# il1 and dl1 cache block size are fixed at ifqize * 8
il1_1way = ["il1:%s:8:1:l" %x for x in [1024,2048,4096,8192]]
il1_2way = ["il1:%s:8:2:l" %(x/2) for x in [1024,2048,4096,8192]]
il1_4way = ["il1:%s:8:4:l" %(x/4) for x in [1024,2048,4096,8192]]
# ul2 block size must be il1 * 2
dl2_1way = ["dl2:%s:16:1:l" %(x) for x in [4096,8192,16384,32768,65536]]
dl2_2way = ["dl2:%s:16:2:l" %(x/2) for x in [4096,8192,16384,32768,65536]]
dl2_4way = ["dl2:%s:16:4:l" %(x/4) for x in [4096,8192,16384,32768,65536]]
dl2_8way = ["dl2:%s:16:8:l" %(x/8) for x in [4096,8192,16384,32768,65536]]
dl2_16way = ["dl2:%s:16:16:l" %(x/16) for x in [4096,8192,16384,32768,65536]]
makeConfigs("ex_BT_2lev_dynamic",
{'cache:il1': il1_1way + il1_2way + il1_4way,
'cache:dl2': dl2_1way + dl2_2way + dl2_4way + dl2_8way + dl2_16way},
{'bpred': '2lev'},
{'static': [], 'dynamic': [2,4,8]}
)
# Run tests
runBenchmarksOnTestSets(["ex_BT_2lev_dynamic"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["ex_BT_2lev_dynamic"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
# il1 and dl1 cache block size are fixed at ifqize * 8
il1 = ["il1:512:%s:1:l" %(x*8) for x in [8]]
makeConfigs("optimal_w_bpred_test_fetch_speed",
{
'fetch:ifqsize': [8],
'fetch:speed': [1,2,3,4],
'cache:il1': il1,
'cache:dl2': ["ul2:1024:128:2:l"]
},
{
'bpred': 'comb', # Certain
'bpred:ras': 8, # Only certain that RAS > 0
},
useOptimal = True
)
# Run tests
#runBenchmarksOnTestSets(["optimal_w_bpred_test_fetch_speed"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["optimal_w_bpred_test_fetch_speed"])
from make_configs import makeConfigs
from main_script import runBenchmarksOnTestSets, extractDataFromResults
makeConfigs("fetch_speed",
{'fetch:speed': range(1,5)},
{}
)
# Run tests
#runBenchmarksOnTestSets(["fetch_speed"])
# Retrieve results
#extractDataFromResults(["sim_IPC"], ["fetch_speed"])