def emit(self): # Do not touch pointer registers reserved_registers = ["X0", "X1", "X2", "X3", "X4", "X8"] instructions_not_found = [ i for i in self.args.instructions if i not in [ix.name for ix in self.target.isa.instructions.values()] ] if instructions_not_found: raise MicroprobeException( str.format('Instructions {} not available', instructions_not_found)) if not os.path.exists(self.args.output_dir): os.makedirs(self.args.output_dir) valid_instrs = [ i for i in self.target.isa.instructions.values() if i.name in self.args.instructions ] microbenchmarks = [] for instr in valid_instrs: for d in self.args.dependency_distances: cwrapper = get_wrapper('RiscvTestsP') synth = Synthesizer( self.target, # Remove the endless parameter to not generate # an endless loop cwrapper(endless=True), value=0b01010101, ) passes = [ structure.SimpleBuildingBlockPass(self.args.loop_size), instruction.SetRandomInstructionTypePass([instr]), initialization.ReserveRegistersPass(reserved_registers), branch.BranchNextPass(), memory.GenericMemoryStreamsPass([[0, 1024, 1, 32, 1]]), register.DefaultRegisterAllocationPass(dd=d) ] for p in passes: synth.add_pass(p) microbenchmark = instr.name + '_' + str(d) print("Generating %s ..." % microbenchmark) bench = synth.synthesize() synth.save(str.format('{}/{}', self.args.output_dir, microbenchmark), bench=bench) microbenchmarks += [microbenchmark] # Emit a Makefile fragment (tests.d) that identifies all tests # created f = open(str.format('{}/tests.d', self.args.output_dir), 'w') f.write( str.format('# Autogenerated by {}\n', sys.argv[0]) + 'tests = \\\n\t' + '\\\n\t'.join([m for m in microbenchmarks])) f.close()
def _get_wrapper(name): try: return get_wrapper(name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers " "of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error was: %s" % (name, str(exc)))
def generate(test_definition, outputfile, target, **kwargs): """ Microbenchmark generation policy :param test_definition: Test definition object :type test_definition: :class:`MicroprobeTestDefinition` :param outputfile: Outputfile name :type outputfile: :class:`str` :param target: Target definition object :type target: :class:`Target` """ variables = test_definition.variables print_info("Interpreting assembly...") sequence = interpret_asm( test_definition.code, target, [var.name for var in variables] ) if len(sequence) < 1: raise MicroprobeMPTFormatError( "No instructions found in the 'instructions' entry of the MPT" " file. Check the input file." ) max_ins = test_definition.instruction_count if kwargs["max_trace_size"] != _DEFAULT_MAX_INS or max_ins is None: max_ins = kwargs["max_trace_size"] # registers = test_definition.registers # raw = test_definition.raw # if test_definition.default_data_address is None: # print_error("Default data address is needed") # exit(-1) # if test_definition.default_code_address is None: # print_error("Default code address is needed") # exit(-1) wrapper_name = "QTrace" print_info("Creating benchmark synthesizer...") try: cwrapper = microprobe.code.get_wrapper(wrapper_name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers " "of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error was: %s" % (wrapper_name, str(exc)) ) start_addr = [ reg.value for reg in test_definition.registers if reg.name in ["PC", "IAR"] ] if start_addr: start_addr = start_addr[0] else: start_addr = test_definition.default_code_address if start_addr != test_definition.default_code_address: print_error( "Default code address does not match register state " "PC/IAR value. Check MPT consistency." ) exit(-1) wrapper_kwargs = {} wrapper_kwargs["init_code_address"] = start_addr wrapper_kwargs["init_data_address"] = test_definition.default_data_address wrapper = cwrapper(**wrapper_kwargs) synth = microprobe.code.TraceSynthesizer( target, wrapper, show_trace=kwargs.get( "show_trace", False), maxins=max_ins, start_addr=start_addr, no_scratch=True ) # if len(registers) >= 0: # synth.add_pass( # microprobe.passes.initialization.InitializeRegistersPass( # registers, skip_unknown=True, warn_unknown=True # ) # ) synth.add_pass( microprobe.passes.structure.SimpleBuildingBlockPass(len(sequence)) ) synth.add_pass( microprobe.passes.instruction.ReproduceSequencePass(sequence) ) synth.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass() ) synth.add_pass( microprobe.passes.branch.NormalizeBranchTargetsPass() ) synth.add_pass( microprobe.passes.memory.InitializeMemoryDecorator( default=kwargs.get("default_memory_access_pattern", None) ) ) synth.add_pass( microprobe.passes.branch.InitializeBranchDecorator( default=kwargs.get("default_branch_pattern", None), indirect=kwargs.get("default_branch_indirect_target_pattern", None) ) ) synth.add_pass( microprobe.passes.symbol.ResolveSymbolicReferencesPass() ) print_info("Synthesizing...") bench = synth.synthesize() # Save the microbenchmark synth.save(outputfile, bench=bench) return
def generate(test_definition, output_file, target, **kwargs): """ Microbenchmark generation policy. :param test_definition: Test definition object :type test_definition: :class:`MicroprobeTestDefinition` :param output_file: Output file name :type output_file: :class:`str` :param target: Target definition object :type target: :class:`Target` """ end_address_orig = None overhead = 0 if len(test_definition.dat_mappings) > 0: # # Assuming MPT generated from MAMBO full system # dat = target.get_dat(dat_map=test_definition.dat_mappings) dat.control['DAT'] = True for instr in test_definition.code: instr.address = dat.translate(instr.address, rev=True) # Address order might have changed after mapping test_definition.set_instruction_definitions( sorted(test_definition.code, key=lambda x: x.address) ) # remove not translated addresses (needed?) # variables = [var for var in test_definition.variables # if var.address != dat.translate(var.address, rev=True)] # test_definition.set_variables_definition(variables) for var in test_definition.variables: var.address = dat.translate(var.address, rev=True) # Address order might have changed after mapping test_definition.set_variables_definition( sorted(test_definition.variables, key=lambda x: x.address) ) if test_definition.default_code_address != 0: test_definition.default_code_address = dat.translate( test_definition.default_code_address, rev=True ) if test_definition.default_data_address != 0: test_definition.default_data_address = dat.translate( test_definition.default_data_address, rev=True ) for access in test_definition.roi_memory_access_trace: access.address = dat.translate( access.address, rev=True ) if 'raw_bin' in kwargs: print_info("Interpreting RAW dump...") sequence = [] raw_dict = {} current_address = 0 # Assume state file provides the initial code address displ = test_definition.default_code_address test_definition.set_default_code_address(0) for entry in test_definition.code: if (not entry.assembly.upper().startswith("0X") and not entry.assembly.upper().startswith("0B")): raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "assembly (%s)" % entry.assembly ) if entry.label is not None: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "labels (%s)" % entry.label ) if entry.decorators not in ['', ' ', None, []]: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "decorators (%s)" % entry.decorators ) if entry.comments not in ['', ' ', None, []]: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "comments (%s)" % entry.comments ) if entry.address is not None: current_address = entry.address + displ if current_address not in raw_dict: raw_dict[current_address] = "" # Assume that raw dump use a 4 bytes hex dump if len(entry.assembly) != 10: raise MicroprobeMPTFormatError( "This is not a RAW 4-byte dump as it contains " "lines with other formats (%s)" % entry.assembly ) raw_dict[current_address] += entry.assembly[2:] if len(raw_dict) > 1: address_ant = sorted(raw_dict.keys())[0] len_ant = len(raw_dict[address_ant])//2 # Assume that raw dump use a 4 bytes hex dump assert len_ant % 4 == 0 for address in sorted(raw_dict.keys())[1:]: if address_ant + len_ant == address: raw_dict[address_ant] += raw_dict[address] len_ant = len(raw_dict[address_ant])//2 raw_dict.pop(address) else: len_ant = len(raw_dict[address])//2 address_ant = address # Assume that raw dump use a 4 bytes hex dump assert len_ant % 4 == 0 sequence = [] for address in sorted(raw_dict.keys()): # Endianess will be big endian, because we are concatenating # full words resulting in the higher bits being encoded first code = interpret_bin( raw_dict[address], target, safe=True, little_endian=False, word_length=4 ) for instr in code: instr.address = address instr = instruction_from_definition(instr) address = address + instr.architecture_type.format.length instr = instruction_to_asm_definition(instr) sequence.append(instr) test_definition.set_instruction_definitions(sequence) reset_steps = [] if 'no_wrap_test' not in kwargs: if test_definition.default_code_address != 0: print_error("Default code address should be zero") exit(-1) print_info("Wrapping function...") start_symbol = "START_TEST" init_address = test_definition.default_code_address for register in test_definition.registers: if register.name == "PC": init_address = register.value if register.name == "PSW_ADDR": init_address = register.value displacements = [] for elem in test_definition.code: if elem.address is not None: if len(displacements) == 0: displacements.append( (elem.address, 4*1024, elem.address - init_address) ) else: displacements.append( (elem.address, elem.address - displacements[-1][0], elem.address - init_address) ) # Get ranges with enough space to put init code # Assuming 4K space is enough displacements = [ displ for displ in displacements if displ[1] >= 4*1024 and displ[2] <= 0 ] if len(displacements) == 0: print_error( "Unable to find space for the initialization code. " "Check the mpt initial code address or state of PC " "for correctness." ) exit(-1) displ_fixed = False if kwargs['fix_start_address']: displacement = kwargs['fix_start_address'] print_info("Start point set to 0x%X" % displacement) displ_fixed = True elif 'fix_long_jump' in kwargs: displacement = sorted(displacements, key=lambda x: x[0])[0][0] if displacement > 2**32: displacement = 0x1000000 print_info("Start point set to 0x%X" % displacement) displ_fixed = True else: displacement = sorted(displacements, key=lambda x: x[2])[-1][0] start_symbol = None init_found = False for instr in test_definition.code: if instr.address == init_address: if instr.label is None: instr.label = "START_TEST" start_symbol = instr.label init_found = True break if not init_found: print_error( "Initial instruction address (%s) not found" % hex(init_address) ) exit(-1) if start_symbol is None: if test_definition.code[0].label is None: test_definition.code[0].label = "START_TEST" start_symbol = test_definition.code[0].label if displacement is None: displacement = 0 instructions = [] reset_steps = [] if 'wrap_endless' in kwargs and 'reset' in kwargs: target.scratch_var.set_address( Address( base_address=target.scratch_var.name ) ) new_ins, overhead, reset_steps = _compute_reset_code( target, test_definition, kwargs, ) instructions += new_ins if 'fix_long_jump' in kwargs: instructions += target.function_call( init_address, long_jump=True ) else: instructions += target.function_call( ("%s" % start_symbol).replace("+0x-", "-0x"), ) if 'wrap_endless' not in kwargs: instructions += [target.nop()] else: instructions += _compute_reset_jump(target, instructions) instructions_definitions = [] for instruction in instructions: instruction.set_label(None) if not displ_fixed: displacement = (displacement - instruction.architecture_type.format.length) current_instruction = MicroprobeAsmInstructionDefinition( instruction.assembly(), None, None, None, instruction.comments, ) instructions_definitions.append(current_instruction) instruction = target.nop() instruction.set_label(None) if not displ_fixed: displacement = (displacement - instruction.architecture_type.format.length) # To avoid overlaps if not displ_fixed: align = 0x100 displacement = ((displacement // align) + 0) * align instructions_definitions[0].address = displacement assert instructions_definitions[0].address is not None # instr = MicroprobeAsmInstructionDefinition( # instruction.assembly(), "ELF_ABI_EXIT", None, None, None) # end_address_orig = \ # (test_definition.default_code_address + displacement_end - # instruction.architecture_type.format.length) instructions_definitions[0].label = "mpt2elf_endless" test_definition.register_instruction_definitions( instructions_definitions, prepend=True, ) assert test_definition.code[0].address is not None if not displ_fixed: test_definition.set_default_code_address( test_definition.default_code_address + displacement, ) for elem in test_definition.code: if elem.address is not None: elem.address = elem.address - displacement else: test_definition.set_default_code_address( displacement ) for elem in test_definition.code: if elem.address is not None: elem.address = elem.address - displacement variables = test_definition.variables variables = [var for var in test_definition.variables if var.address is None or var.address >= 0x00100000] test_definition.set_variables_definition(variables) print_info("Interpreting asm ...") sequence_orig = interpret_asm( test_definition.code, target, [var.name for var in variables] + [target.scratch_var.name], show_progress=True, ) if len(sequence_orig) < 1: raise MicroprobeMPTFormatError( "No instructions found in the 'instructions' entry of the MPT" " file. Check the input file.", ) raw = test_definition.raw raw['FILE_FOOTER'] = "# mp_mpt2elf: Wrapping overhead: %03.2f %%" \ % overhead # end_address = end_address_orig ckwargs = { # 'end_address': end_address, # 'reset': False, # 'endless': 'endless' in kwargs } wrapper_name = "AsmLd" if test_definition.default_data_address is not None: ckwargs['init_data_address'] = \ test_definition.default_data_address if test_definition.default_code_address is not None: ckwargs['init_code_address'] = \ test_definition.default_code_address try: code_wrapper = microprobe.code.get_wrapper(wrapper_name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers" " of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error " "was: %s" % (wrapper_name, str(exc)), ) wrapper = code_wrapper(**ckwargs) print_info("Setup synthesizer ...") synthesizer = microprobe.code.Synthesizer( target, wrapper, no_scratch=False, extra_raw=raw, ) variables = test_definition.variables registers = test_definition.registers sequence = sequence_orig if len(registers) >= 0: cr_reg = [ register for register in registers if register.name == "CR" ] registers = [ register for register in registers if register.name != "CR" ] if cr_reg: value = cr_reg[0].value for idx in range(0, 8): cr = MicroprobeTestRegisterDefinition( "CR%d" % idx, (value >> (28 - (idx * 4))) & 0xF, ) registers.append(cr) synthesizer.add_pass( microprobe.passes.initialization.InitializeRegistersPass( registers, skip_unknown=True, warn_unknown=True, skip_control=True, force_reserved=True ), ) synthesizer.add_pass( microprobe.passes.structure.SimpleBuildingBlockPass( len(sequence), ), ) synthesizer.add_pass( microprobe.passes.variable.DeclareVariablesPass( variables, ), ) synthesizer.add_pass( microprobe.passes.instruction.ReproduceSequencePass(sequence), ) if target.name.startswith("power"): fix_branches = [instr.name for instr in target.instructions.values() if instr.branch_conditional] if 'raw_bin' in kwargs: # We do not know what is code and what is data, so we safely # disable the asm generation and keep the values for orig in [21, 17, 19]: synthesizer.add_pass( microprobe.passes.instruction.DisableAsmByOpcodePass( fix_branches, 0, ifval=orig ) ) else: # We know what is code and what is data, so we can safely # fix the branch instructions for new, orig in [(20, 21), (16, 17), (18, 19)]: synthesizer.add_pass( SetInstructionOperandsByOpcodePass( fix_branches, 0, new, force=True, ifval=orig ) ) if kwargs.get("fix_memory_registers", False): kwargs["fix_memory_references"] = True if kwargs.get("fix_memory_references", False): print_info("Fix memory references: On") synthesizer.add_pass( microprobe.passes.memory.FixMemoryReferencesPass( reset_registers=kwargs.get("fix_memory_registers", False), ), ) synthesizer.add_pass( microprobe.passes.register.FixRegistersPass( forbid_writes=['GPR3'], ), ) if kwargs.get("fix_memory_registers", False): print_info("Fix memory registers: On") synthesizer.add_pass( microprobe.passes.register.NoHazardsAllocationPass(), ) if kwargs.get("fix_branch_next", False): print_info("Force branch to next: On") synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass( force="fix_flatten_code" in kwargs, noinit=True ) ) synthesizer.add_pass( microprobe.passes.branch.BranchNextPass(force=True), ) if kwargs.get("fix_indirect_branches", False): print_info("Fix indirect branches: On") synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass( noinit=True ), ) synthesizer.add_pass( microprobe.passes.branch.FixIndirectBranchPass(), ) if displ_fixed: synthesizer.add_pass( microprobe.passes.address.SetInitAddressPass(displacement) ) synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass( noinit=True, init_from_first=not displ_fixed, ), ) synthesizer.add_pass( microprobe.passes.variable.UpdateVariableAddressesPass( ), ) synthesizer.add_pass( microprobe.passes.symbol.ResolveSymbolicReferencesPass( onlyraw=True ), ) print_info("Start synthesizer ...") bench = synthesizer.synthesize() # Save the microbenchmark synthesizer.save(output_file, bench=bench) print_info("'%s' generated!" % output_file) _compile(output_file, target, **kwargs) return
def emit(self): # Do not touch pointer registers reserved_registers = ["X0", "X1", "X2", "X3", "X4", "X8"] instructions_not_found = [ i for i in self.args.instructions if i not in [ix.name for ix in self.target.isa.instructions.values()] ] if instructions_not_found: raise MicroprobeException( str.format('Instructions {} not available', instructions_not_found)) if not os.path.exists(self.args.output_dir): os.makedirs(self.args.output_dir) valid_instrs = [ i for i in self.target.isa.instructions.values() if i.name in self.args.instructions ] # Generate permutations of instruction sequences and randomize order random.seed(rs) instr_seq_count = len(valid_instrs) print("Instruction sequence count: " + str(instr_seq_count)) # Select instruction sequence permutations if (self.args.num_permutations > math.factorial( min(instr_seq_count, MAX_INSTR_PERM_LENGTH))): print("ERROR: Selected sequences cannot exceed num. permutations") sys.exit() # Check if number of instructions exceeds maximum permutation length # -- Fix to prevent permutation function from hanging if (instr_seq_count > MAX_INSTR_PERM_LENGTH): print("WARNING: Instruction sequence is too long...\ Selecting from reduced number of permutations!!") reduced_instrs = valid_instrs[0:MAX_INSTR_PERM_LENGTH] reduced_instr_seq = list( it.permutations(reduced_instrs, len(reduced_instrs))) random.shuffle(reduced_instr_seq) selected_valid_instr_seq = reduced_instr_seq[:][0:self.args. num_permutations] # Append remaining instructions to each of the sequences in list rem_instr_seq = valid_instrs[MAX_INSTR_PERM_LENGTH:instr_seq_count] for s in range(0, len(selected_valid_instr_seq)): selected_valid_instr_seq[s] = list( selected_valid_instr_seq[s]) + rem_instr_seq else: # Generate complete list of permutations valid_instr_seq = list(it.permutations(valid_instrs)) random.shuffle(valid_instr_seq) selected_valid_instr_seq = valid_instr_seq[:][0:self.args. num_permutations] microbenchmarks = [] # Loop over selected sequence permutations for vi in range(0, len(selected_valid_instr_seq)): vi_seq = selected_valid_instr_seq[:][vi] for d in self.args.dependency_distances: microbenchmark = '' cwrapper = get_wrapper('RiscvTestsP') synth = Synthesizer( self.target, # Remove the endless parameter to not generate # an endless loop cwrapper(endless=True), value=0b01010101, ) passes = [ structure.SimpleBuildingBlockPass(self.args.loop_size), instruction.SetInstructionTypeBySequencePass(vi_seq), initialization.ReserveRegistersPass(reserved_registers), branch.BranchNextPass(), memory.GenericMemoryStreamsPass([[0, 1024, 1, 32, 1]]), register.DefaultRegisterAllocationPass(dd=d) ] for p in passes: synth.add_pass(p) if (not self.args.microbenchmark_name): for instr in vi_seq: microbenchmark = microbenchmark +instr.name + '_DD' + str(d) else: microbenchmark = self.args.microbenchmark_name \ + '_DD' + str(d) + '_' + str(vi) print("Generating %s ..." % microbenchmark) bench = synth.synthesize() synth.save(str.format('{}/{}', self.args.output_dir, microbenchmark), bench=bench) microbenchmarks += [microbenchmark] # Print out microbenchmark names print("Generating microbenchmarks named:") print(microbenchmarks) # Emit a Makefile fragment (tests.d) that identifies all tests # created f = open( str.format('{}/' + self.args.microbenchmark_name + '_tests.d', self.args.output_dir), 'w') f.write( str.format('# Autogenerated by {}\n', sys.argv[0]) + 'tests = \\\n\t' + '\\\n\t'.join([m for m in microbenchmarks])) f.close()
def generate(test_definition, outputfile, target, **kwargs): """ Microbenchmark generation policy :param test_definition: Test definition object :type test_definition: :class:`MicroprobeTestDefinition` :param outputfile: Outputfile name :type outputfile: :class:`str` :param target: Target definition object :type target: :class:`Target` """ variables = test_definition.variables if 'raw_bin' in kwargs: print_info("Interpreting RAW dump...") sequence = [] raw_dict = {} current_address = 0 for entry in test_definition.code: if (not entry.assembly.upper().startswith("0X") and not entry.assembly.upper().startswith("0B")): raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "assembly (%s)" % entry.assembly) if entry.label is not None: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "labels (%s)" % entry.label) if entry.decorators not in ['', ' ', None, []]: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "decorators (%s)" % entry.decorators) if entry.comments not in ['', ' ', None, []]: raise MicroprobeMPTFormatError( "This is not a RAW dump as it contains " "comments (%s)" % entry.comments) if entry.address is not None: current_address = entry.address if current_address not in raw_dict: raw_dict[current_address] = "" # Assume that raw dump use a 4 bytes hex dump if len(entry.assembly) != 10: raise MicroprobeMPTFormatError( "This is not a RAW 4-byte dump as it contains " "lines with other formats (%s)" % entry.assembly) raw_dict[current_address] += entry.assembly[2:] if len(raw_dict) > 1: address_ant = sorted(raw_dict.keys())[0] len_ant = len(raw_dict[address_ant]) // 2 # Assume that raw dump use a 4 bytes hex dump assert len_ant % 4 == 0 for address in sorted(raw_dict.keys())[1:]: if address_ant + len_ant == address: raw_dict[address_ant] += raw_dict[address] len_ant = len(raw_dict[address_ant]) // 2 raw_dict.pop(address) else: len_ant = len(raw_dict[address]) // 2 address_ant = address # Assume that raw dump use a 4 bytes hex dump assert len_ant % 4 == 0 sequence = [] for address in sorted(raw_dict.keys()): # Endianess will be big endian, because we are concatenating # full words resulting in the higher bits being encoded first code = interpret_bin(raw_dict[address], target, safe=True, little_endian=False, word_length=4) code[0].address = address sequence.extend(code) else: print_info("Interpreting assembly...") sequence = interpret_asm(test_definition.code, target, [var.name for var in variables]) if len(sequence) < 1: raise MicroprobeMPTFormatError( "No instructions found in the 'instructions' entry of the MPT" " file. Check the input file.") registers = test_definition.registers raw = test_definition.raw for instruction_def in sequence: if instruction_def.address is not None: print_warning("Instruction address not needed in '%s'" % instruction_def.asm) if test_definition.default_data_address is not None: print_warning("Default data address not needed") if test_definition.default_code_address is not None: print_warning("Default code address not needed") wrapper_name = "CWrapper" if kwargs.get("endless", False): print_warning("Using endless C wrapper") wrapper_name = "CInfGen" print_info("Creating benchmark synthesizer...") try: cwrapper = microprobe.code.get_wrapper(wrapper_name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers " "of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error was: %s" % (wrapper_name, str(exc))) wrapper_kwargs = {} wrapper = cwrapper(**wrapper_kwargs) synth = microprobe.code.Synthesizer(target, wrapper, extra_raw=raw) if len(registers) >= 0: print_info("Add register initialization pass") synth.add_pass( microprobe.passes.initialization.InitializeRegistersPass( registers, skip_unknown=True, warn_unknown=True)) synth.add_pass( microprobe.passes.structure.SimpleBuildingBlockPass(len(sequence))) synth.add_pass(microprobe.passes.variable.DeclareVariablesPass(variables)) synth.add_pass( microprobe.passes.instruction.ReproduceSequencePass(sequence)) if kwargs.get("fix_indirect_branches", False): print_info("Fix indirect branches: On") synth.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass()) synth.add_pass(microprobe.passes.branch.FixIndirectBranchPass()) if kwargs.get("fix_branch_next", False): print_info("Force branch to next: On") synth.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass()) synth.add_pass(microprobe.passes.branch.BranchNextPass(force=True)) if kwargs.get("fix_memory_registers", False): kwargs["fix_memory_references"] = True if kwargs.get("fix_memory_references", False): synth.add_pass( microprobe.passes.memory.FixMemoryReferencesPass( reset_registers=kwargs.get("fix_memory_registers", False))) if kwargs.get("fix_memory_registers", False): print_info("Fix memory registers: On") synth.add_pass(microprobe.passes.register.NoHazardsAllocationPass()) print_info("Synthesizing...") bench = synth.synthesize() # Save the microbenchmark synth.save(outputfile, bench=bench) return
def generate(test_definition, outputfile, target, **kwargs): """ Microbenchmark generation policy :param test_definition: Test definition object :type test_definition: :class:`MicroprobeTestDefinition` :param outputfile: Outputfile name :type outputfile: :class:`str` :param target: Target definition object :type target: :class:`Target` """ variables = test_definition.variables print_info("Interpreting assembly...") sequence = interpret_asm(test_definition.code, target, [var.name for var in variables]) if len(sequence) < 1: raise MicroprobeMPTFormatError( "No instructions found in the 'instructions' entry of the MPT" " file. Check the input file.") registers = test_definition.registers raw = test_definition.raw for instruction_def in sequence: if instruction_def.address is not None: print_warning("Instruction address not needed in '%s'" % instruction_def.asm) if test_definition.default_data_address is not None: print_warning("Default data address not needed") if test_definition.default_code_address is not None: print_warning("Default code address not needed") wrapper_name = "CWrapper" if kwargs.get("endless", False): print_warning("Using endless C wrapper") wrapper_name = "CInfGen" print_info("Creating benchmark synthesizer...") try: cwrapper = microprobe.code.get_wrapper(wrapper_name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers " "of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error was: %s" % (wrapper_name, str(exc))) wrapper_kwargs = {} wrapper = cwrapper(**wrapper_kwargs) synth = microprobe.code.Synthesizer(target, wrapper, extra_raw=raw) if len(registers) >= 0: print_info("Add register initialization pass") synth.add_pass( microprobe.passes.initialization.InitializeRegistersPass( registers, skip_unknown=True, warn_unknown=True)) synth.add_pass( microprobe.passes.structure.SimpleBuildingBlockPass(len(sequence))) synth.add_pass(microprobe.passes.variable.DeclareVariablesPass(variables)) synth.add_pass( microprobe.passes.instruction.ReproduceSequencePass(sequence)) if kwargs.get("fix_memory_registers", False): kwargs["fix_memory_references"] = True if kwargs.get("fix_memory_references", False): synth.add_pass( microprobe.passes.memory.FixMemoryReferencesPass( reset_registers=kwargs.get("fix_memory_registers", False))) if kwargs.get("fix_memory_registers", False): print_info("Fix memory registers: On") synth.add_pass(microprobe.passes.register.NoHazardsAllocationPass()) if kwargs.get("fix_branch_next", False): print_info("Force branch to next: On") synth.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass()) synth.add_pass(microprobe.passes.branch.BranchNextPass(force=True)) if kwargs.get("fix_indirect_branches", False): print_info("Fix indirect branches: On") synth.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass()) synth.add_pass(microprobe.passes.branch.FixIndirectBranchPass()) print_info("Synthesizing...") bench = synth.synthesize() # Save the microbenchmark synth.save(outputfile, bench=bench) return
def generate(test_definition, output_file, target, **kwargs): """ Microbenchmark generation policy. :param test_definition: Test definition object :type test_definition: :class:`MicroprobeTestDefinition` :param output_file: Output file name :type output_file: :class:`str` :param target: Target definition object :type target: :class:`Target` """ end_address_orig = None overhead = 0 reset_steps = [] if 'no_wrap_test' not in kwargs and False: start_symbol = "START_TEST" displacement = None for elem in test_definition.code: if elem.address is not None: if displacement is None: displacement = elem.address displacement = min(displacement, elem.address) if test_definition.code[0].label is not None: start_symbol = test_definition.code[0].label else: test_definition.code[0].label = "START_TEST" if displacement is None: displacement = 0 displacement_end = displacement instructions = [] reset_steps = [] if 'wrap_endless' in kwargs: new_ins, overhead, reset_steps = _compute_reset_code( target, test_definition, kwargs, ) instructions += new_ins instructions += target.function_call( ("%s+0x%x" % (start_symbol, (-1) * displacement)).replace("+0x-", "-0x"), ) if 'wrap_endless' not in kwargs: instructions += [target.nop()] else: instructions += _compute_reset_jump(target, len(instructions)) instructions_definitions = [] for instruction in instructions: instruction.set_label(None) displacement = (displacement - instruction.architecture_type.format.length) current_instruction = MicroprobeAsmInstructionDefinition( instruction.assembly(), None, None, None, instruction.comments, ) instructions_definitions.append(current_instruction) instruction = target.nop() instruction.set_label(None) displacement = (displacement - instruction.architecture_type.format.length) end_address_orig = \ (test_definition.default_code_address + displacement_end - instruction.architecture_type.format.length) test_definition.register_instruction_definitions( instructions_definitions, prepend=True, ) test_definition.set_default_code_address( test_definition.default_code_address + displacement, ) for elem in test_definition.code: if elem.address is not None: elem.address = elem.address - displacement variables = test_definition.variables print_info("Interpreting asm ...") sequence_orig = interpret_asm( test_definition.code, target, [var.name for var in variables], show_progress=True, ) if len(sequence_orig) < 1: raise MicroprobeMPTFormatError( "No instructions found in the 'instructions' entry of the MPT" " file. Check the input file.", ) raw = test_definition.raw shift_offset, addresses = _compute_offset( 0, target, test_definition, ) thread_id = 1 shift_value = shift_offset * (thread_id - 1) end_address = end_address_orig if end_address: end_address = end_address_orig + shift_value ckwargs = { 'reset': False, 'endless': 'endless' in kwargs } # if test_definition.default_data_address is not None: # ckwargs['init_data_address'] = \ # test_definition.default_data_address + shift_value # if test_definition.default_code_address is not None: # ckwargs['init_code_address'] = \ # test_definition.default_code_address + shift_value wrapper_name = "Cronus" try: code_wrapper = microprobe.code.get_wrapper(wrapper_name) except MicroprobeValueError as exc: raise MicroprobeException( "Wrapper '%s' not available. Check if you have the wrappers" " of the target installed or set up an appropriate " "MICROPROBEWRAPPERS environment variable. Original error " "was: %s" % (wrapper_name, str(exc)), ) wrapper = code_wrapper(os.path.basename(output_file), **ckwargs) print_info("Setup synthesizer ...") synthesizer = microprobe.code.Synthesizer( target, wrapper, no_scratch=True, extra_raw=raw, ) print_info("Processing thread-%d" % thread_id) synthesizer.set_current_thread(thread_id) variables = test_definition.variables registers = test_definition.registers sequence = sequence_orig cr_reg = [ register for register in registers if register.name == "CR" ] registers = [ register for register in registers if register.name != "CR" ] if cr_reg: value = cr_reg[0].value for idx in range(0, 8): cr = MicroprobeTestRegisterDefinition( "CR%d" % idx, (value >> (28 - (idx * 4))) & 0xF, ) registers.append(cr) synthesizer.add_pass( microprobe.passes.initialization.InitializeRegistersPass( registers, skip_unknown=True, warn_unknown=True, force_reserved=False, skip_control=True ), ) synthesizer.add_pass( microprobe.passes.structure.SimpleBuildingBlockPass( len(sequence), ), ) synthesizer.add_pass( microprobe.passes.variable.DeclareVariablesPass( variables, ), ) synthesizer.add_pass( microprobe.passes.instruction.ReproduceSequencePass(sequence), ) if kwargs.get("fix_memory_registers", False): kwargs["fix_memory_references"] = True if kwargs.get("fix_memory_references", False): print_info("Fix memory references: On") synthesizer.add_pass( microprobe.passes.memory.FixMemoryReferencesPass( reset_registers=kwargs.get("fix_memory_registers", False), ), ) synthesizer.add_pass( microprobe.passes.register.FixRegistersPass( forbid_writes=['GPR3'], ), ) if kwargs.get("fix_memory_registers", False): print_info("Fix memory registers: On") synthesizer.add_pass( microprobe.passes.register.NoHazardsAllocationPass(), ) if kwargs.get("fix_branch_next", False): print_info("Force branch to next: On") synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass( force="fix_flatten_code" in kwargs ) ) synthesizer.add_pass( microprobe.passes.branch.BranchNextPass(force=True), ) if kwargs.get("fix_indirect_branches", False): print_info("Fix indirect branches: On") synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass(), ) synthesizer.add_pass( microprobe.passes.branch.FixIndirectBranchPass(), ) synthesizer.add_pass( microprobe.passes.address.UpdateInstructionAddressesPass(), ) synthesizer.add_pass( microprobe.passes.symbol.ResolveSymbolicReferencesPass(), ) print_info("Start synthesizer ...") bench = synthesizer.synthesize() # Save the microbenchmark synthesizer.save(output_file, bench=bench) return