def __init__(self, fragment_or_module, generators, clocks={"sys": 10}, vcd_name=None,
special_overrides={}):
if isinstance(fragment_or_module, _Fragment):
self.fragment = fragment_or_module
else:
self.fragment = fragment_or_module.get_fragment()
mta = MemoryToArray()
mta.transform_fragment(None, self.fragment)
overrides = {AsyncResetSynchronizer: DummyAsyncResetSynchronizer}
overrides.update(special_overrides)
fs, lowered = lower_specials(overrides=overrides, specials=self.fragment.specials)
self.fragment += fs
self.fragment.specials -= lowered
if self.fragment.specials:
raise ValueError("Could not lower all specials", self.fragment.specials)
if not isinstance(generators, dict):
generators = {"sys": generators}
self.generators = dict()
self.passive_generators = set()
for k, v in generators.items():
if (isinstance(v, collections.Iterable)
and not inspect.isgenerator(v)):
self.generators[k] = list(v)
else:
self.generators[k] = [v]
clocks = collections.OrderedDict(sorted(clocks.items(),
key=operator.itemgetter(0)))
self.time = TimeManager(clocks)
for clock in clocks.keys():
if clock not in self.fragment.clock_domains:
cd = ClockDomain(name=clock, reset_less=True)
cd.clk.reset = C(self.time.clocks[clock].high)
self.fragment.clock_domains.append(cd)
insert_resets(self.fragment)
# comb signals return to their reset value if nothing assigns them
self.fragment.comb[0:0] = [s.eq(s.reset)
for s in list_targets(self.fragment.comb)]
self.evaluator = Evaluator(self.fragment.clock_domains,
mta.replacements)
if vcd_name is None:
self.vcd = DummyVCDWriter()
else:
self.vcd = VCDWriter(vcd_name)
signals = list_signals(self.fragment)
for cd in self.fragment.clock_domains:
signals.add(cd.clk)
if cd.rst is not None:
signals.add(cd.rst)
for memory_array in mta.replacements.values():
signals |= set(memory_array)
self.vcd.init(signals)
for signal in sorted(signals, key=lambda x: x.duid):
self.vcd.set(signal, signal.reset.value)
def __init__(self, fragment_or_module, generators, clocks={"sys": 10}, vcd_name=None,
special_overrides={}):
if isinstance(fragment_or_module, _Fragment):
self.fragment = fragment_or_module
else:
self.fragment = fragment_or_module.get_fragment()
mta = MemoryToArray()
mta.transform_fragment(None, self.fragment)
overrides = {AsyncResetSynchronizer: DummyAsyncResetSynchronizer}
overrides.update(special_overrides)
fs, lowered = lower_specials(overrides=overrides, specials=self.fragment.specials)
self.fragment += fs
self.fragment.specials -= lowered
if self.fragment.specials:
raise ValueError("Could not lower all specials", self.fragment.specials)
if not isinstance(generators, dict):
generators = {"sys": generators}
self.generators = dict()
self.passive_generators = set()
for k, v in generators.items():
if (isinstance(v, collections.Iterable)
and not inspect.isgenerator(v)):
self.generators[k] = list(v)
else:
self.generators[k] = [v]
clocks = collections.OrderedDict(sorted(clocks.items(),
key=operator.itemgetter(0)))
self.time = TimeManager(clocks)
for clock in clocks.keys():
if clock not in self.fragment.clock_domains:
cd = ClockDomain(name=clock, reset_less=True)
cd.clk.reset = C(self.time.clocks[clock].high)
self.fragment.clock_domains.append(cd)
insert_resets(self.fragment)
# comb signals return to their reset value if nothing assigns them
self.fragment.comb[0:0] = [s.eq(s.reset)
for s in list_targets(self.fragment.comb)]
self.evaluator = Evaluator(self.fragment.clock_domains,
mta.replacements)
if vcd_name is None:
self.vcd = DummyVCDWriter()
else:
self.vcd = VCDWriter(vcd_name)
signals = list_signals(self.fragment)
for cd in self.fragment.clock_domains:
signals.add(cd.clk)
if cd.rst is not None:
signals.add(cd.rst)
for memory_array in mta.replacements.values():
signals |= set(memory_array)
for signal in sorted(signals, key=lambda x: x.duid):
self.vcd.set(signal, signal.reset.value)
def __init__(self, fragment_or_module, generators, clocks={"sys": 10}, vcd_name=None):
if isinstance(fragment_or_module, _Fragment):
self.fragment = fragment_or_module
else:
self.fragment = fragment_or_module.get_fragment()
mta = MemoryToArray()
mta.transform_fragment(None, self.fragment)
fs, lowered = lower_specials(overrides={}, specials=self.fragment.specials)
self.fragment += fs
self.fragment.specials -= lowered
if self.fragment.specials:
raise ValueError("Could not lower all specials", self.fragment.specials)
if not isinstance(generators, dict):
generators = {"sys": generators}
self.generators = dict()
self.passive_generators = set()
for k, v in generators.items():
if (isinstance(v, collections.Iterable)
and not inspect.isgenerator(v)):
self.generators[k] = list(v)
else:
self.generators[k] = [v]
clocks = collections.OrderedDict(sorted(clocks.items(),
key=operator.itemgetter(0)))
self.time = TimeManager(clocks)
for clock in clocks.keys():
if clock not in self.fragment.clock_domains:
cd = ClockDomain(name=clock, reset_less=True)
cd.clk.reset = C(self.time.clocks[clock].high)
self.fragment.clock_domains.append(cd)
insert_resets(self.fragment)
# comb signals return to their reset value if nothing assigns them
reset = []
for s, slices in list_targetslices(self.fragment.comb).items():
for l in slices:
if l is None:
reset.append(s.eq(s.reset))
else:
reset.append(s[l[0]:l[1]].eq(s.reset << l[0]))
self.fragment.comb[0:0] = reset
self.evaluator = Evaluator(self.fragment.clock_domains,
mta.replacements)
if vcd_name is None:
self.vcd = DummyVCDWriter()
else:
self.vcd = VCDWriter(vcd_name)