def WriteWithDelay(self): if (GlobalOptions.dryrun): return logger.info("Writing Qstate @0x%x Type: %s size: %d with delay" % (self.addr, self.queue_type, self.size)) model_wrap.write_mem_pcie(self.addr, bytes(self.data), len(self.data)) # On RTL, write is asyncronous and taking long time to complete # Wait until the write succeed otherwise tests may fail in RTL (timing) # Read(synchrouns) in loop and wait until the read data is same as what was inteded to write # Be aware this logic would break if there is continous change to QStata data in hardware # like spruious schdule count in qstate, etc. wdata = self.data[0:64] if GlobalOptions.rtl: count = 1 while True: self.data = qt_params[self.queue_type]['state']( model_wrap.read_mem(self.addr, self.size)) rdata = self.data[0:64] if rdata == wdata: break # Read data is not same as we wrote, so sleep for 1 sec and try again time.sleep(1) count = count + 1 logger.info( "Qstate Write @0x%x Type: %s size: %d completed after %d secs" % (self.addr, self.queue_type, self.size, count))
def Read(self, debug = True): if (GlobalOptions.dryrun): data = bytes(self.size) self.data = qt_params[self.queue_type]['state'](data) return self.data = qt_params[self.queue_type]['state'](model_wrap.read_mem(self.addr, self.size)) if debug is True: logger.info("Read Qstate @0x%x Type: %s size: %d" % (self.addr, self.queue_type, self.size))
def Read(self, lgh=logger): if GlobalOptions.skipverify: return lgh.info("Reading %s @0x%x size: %d" % (self.__data_class__.__name__, self.addr, self.size)) self.data = self.__data_class__( model_wrap.read_mem(self.addr, self.size)) lgh.ShowScapyObject(self.data)
def Read(self): if (GlobalOptions.dryrun): data = bytes(self.size) self.data = RdmaDcqcnProfile(data) return self.data = RdmaDcqcnProfile(model_wrap.read_mem(self.addr, self.size)) logger.info("Read RdmaDcqcnProfile @ 0x%x size: %d: " % (self.addr, self.size)) logger.ShowScapyObject(self.data)
def ReadAtomicResData(self): if (GlobalOptions.dryrun): atomic_res_data = bytes(64) self.atomic_res_data = RdmaAtomicResState(atomic_res_data) return self.atomic_res_data = RdmaAtomicResState( model_wrap.read_mem(self.rdma_atomic_res_addr, 64)) logger.ShowScapyObject(self.atomic_res_data) return
def Read(self): if (GlobalOptions.dryrun): data = bytes(self.size) self.data = RdmaKeyTableEntry(data) return self.data = RdmaKeyTableEntry(model_wrap.read_mem( self.addr, self.size)) logger.info("Read KeyTableEntry @ 0x%x size: %d: " % (self.addr, self.size)) logger.ShowScapyObject(self.data)
def ReadRomeSenderCb(self): if (GlobalOptions.dryrun): return self.rome_sender_data = RdmaROME_SENDERstate( model_wrap.read_mem(self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES, ROME_CB_T_SIZE_BYTES)) logger.ShowScapyObject(self.rome_sender_data) logger.info("Read ROME_SENDER Qstate @0x%x size: %d" % (self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES, ROME_CB_T_SIZE_BYTES)) return
def ReadDcqcnCb(self): if (GlobalOptions.dryrun): return self.dcqcn_data = RdmaDCQCNstate( model_wrap.read_mem(self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES, DCQCN_CB_T_SIZE_BYTES)) logger.ShowScapyObject(self.dcqcn_data) logger.info("Read DCQCN Qstate @0x%x size: %d" % (self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES, DCQCN_CB_T_SIZE_BYTES)) return
def HwxtstxcbRead(self, debug=True): cb_size = len(NvmeHwXtsTxcb()) if (GlobalOptions.dryrun): return NvmeHwXtsTxcb(bytes(cb_size)) if debug is True: logger.info("Read Hwxtstxcb @0x%x size: %d" % (self.tx_hwxtscb_addr, cb_size)) cb = NvmeHwXtsTxcb(model_wrap.read_mem(self.tx_hwxtscb_addr, cb_size)) logger.ShowScapyObject(cb) return cb
def NscbRead(self, debug=True): nscb_size = len(NvmeNscb()) if (GlobalOptions.dryrun): return NvmeNscb(bytes(nscb_size)) if debug is True: logger.info("Read Nscb @0x%x size: %d" % (self.nscb_addr, nscb_size)) nscb = NvmeNscb(model_wrap.read_mem(self.nscb_addr, nscb_size)) logger.ShowScapyObject(nscb) return nscb
def NvmesessprodrxcbRead(self, debug=True): cb_size = len(Nvmesessprodrxcb()) if (GlobalOptions.dryrun): return Nvmesessprodrxcb(bytes(cb_size)) if debug is True: logger.info("Read sessprodrxcb @0x%x size: %d" % (self.rxsessprodcb_addr, cb_size)) cb = Nvmesessprodrxcb( model_wrap.read_mem(self.rxsessprodcb_addr, cb_size)) logger.ShowScapyObject(cb) return cb
def CmdIdRead(self, index, debug=True): entry_size = len(NvmeCmdContextRingEntry()) if (GlobalOptions.dryrun): return NvmeCmdContextRingEntry(bytes(entry_size)) addr = self.cmd_context_ring_base + (index * entry_size) if debug is True: logger.info("Read CmdContextRingEntry @0x%x index: %d size: %d" % (addr, index, entry_size)) entry = NvmeCmdContextRingEntry(model_wrap.read_mem(addr, entry_size)) logger.ShowScapyObject(entry) return entry.cid
def ReadRomeReceiverCb(self): if (GlobalOptions.dryrun): rome_receiver_data = bytes(ROME_CB_T_SIZE_BYTES) self.rome_receiver_data = RdmaROME_RECEIVERstate( rome_receiver_data) return self.rome_receiver_data = RdmaROME_RECEIVERstate( model_wrap.read_mem( self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES + DCQCN_CB_T_SIZE_BYTES, ROME_CB_T_SIZE_BYTES)) logger.ShowScapyObject(self.rome_receiver_data) logger.info("Read ROME_RECEIVER Qstate @0x%x size: %d" % (self.header_temp_addr + AH_ENTRY_T_SIZE_BYTES + DCQCN_CB_T_SIZE_BYTES, ROME_CB_T_SIZE_BYTES)) return
def Read(self): """ Reads a Descriptor from "self.address" :return: """ if self.mem_handle: self.phy_address = resmgr.HostMemoryAllocator.v2p(self.address) mem_handle = objects.MemHandle(self.address, self.phy_address) desc = NvmeTcprqDescriptor( resmgr.HostMemoryAllocator.read(mem_handle, 64)) else: hbm_addr = self.address desc = NvmeTcprqDescriptor(model_wrap.read_mem(hbm_addr, 64)) logger.ShowScapyObject(desc)
def __init__(self, addr, __data_class__): self.addr = addr self.__data_class__ = __data_class__ self.size = len(self.__data_class__()) self.data = __data_class__(model_wrap.read_mem(self.addr, self.size))