def bias_cur_status(self, slaves=None, output=True):
self.activate_i2c()
self.gbld_addr(slaves)
table_raw = []
table = []
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, 0x185, 1,
self.i2c_type, self.i2c_freq, data='c4')
sleep(0.08) # Give GBTx/GBLD some time to respond
reg = i2c_read(self.gbt, self.sca, self.bus, s, 0x17f, 1,
self.i2c_type, self.i2c_freq)
cur = self.gbld_reg_to_cur(reg)
table_raw.append([s, cur])
if cur <= 6.1:
cur_fmt = fg.green+ef.bold+str(cur)+rs.bold_dim+fg.rs
else:
cur_fmt = fg.yellow+ef.bold+str(cur)+rs.bold_dim+fg.rs
table.append([s, cur_fmt])
if output:
print(tabulate(table, headers=['slave', 'current [mA]']))
else:
return table_raw
def write(self, subaddr, data, slaves=None):
self.activate_i2c()
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, subaddr,
num_of_byte(data),
self.i2c_type, self.i2c_freq, data=data)
def prbs(self, mode, slaves=None):
try:
val = PRBS_MODE[mode]
except KeyError:
val = mode
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, 0x1c, 1,
self.i2c_type, self.i2c_freq, data=val)
def salt_tfc_phase(gbt, bus, asic, phase):
i2c_write(gbt,
0,
bus,
addr_shift(0, asic),
2,
1,
I2C_TYPE['salt'],
I2C_FREQ['100KHz'],
data=pad(phase))
def write(self, addr, subaddr, data, asics=None):
self.activate_i2c()
for s in self.dyn_asics(asics):
i2c_write(self.gbt,
self.sca,
self.bus,
addr_shift(addr, s),
subaddr,
num_of_byte(data),
self.i2c_type,
self.i2c_freq,
data=data)
def salt_ser_src(gbt, bus, asic, src):
try:
val = SALT_SER_SRC_MODE[src]
except KeyError:
val = src
i2c_write(gbt,
0,
bus,
addr_shift(0, asic),
0,
1,
I2C_TYPE['salt'],
I2C_FREQ['100KHz'],
data=val)
def bias_cur_set(self, cur, slaves=None):
self.activate_i2c()
reg = self.gbld_cur_to_reg(cur)
gbld_conf = '8799{}88ffff04'.format(reg)
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, 0x37, 7,
self.i2c_type, self.i2c_freq, data=gbld_conf)
self.gbld_addr(slaves)
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, 0x184, 1,
self.i2c_type, self.i2c_freq, data='c4')
sleep(0.08)
def init(self, asics=None):
self.reset()
self.activate_i2c()
for s in self.dyn_asics(asics):
for addr, subaddr, val in SALT_INIT_SEQ:
addr = addr_shift(addr, s)
i2c_write(self.gbt,
self.sca,
self.bus,
addr,
subaddr,
1,
self.i2c_type,
self.i2c_freq,
data=val)
def dcb_elk_phase(gbt, slave, ch, phase):
for reg in DCB_ELK_PHASE_REG[ch]:
i2c_write(gbt, DCB_SCA, DCB_SLAVE_I2C_BUS,
slave, reg, 1, I2C_TYPE['gbtx'], I2C_FREQ['1MHz'],
data=phase*2)
def gbld_addr(self, slaves=None):
for s in self.dyn_slaves(slaves):
i2c_write(self.gbt, self.sca, self.bus, s, 0xfd, 1,
self.i2c_type, self.i2c_freq, data='7e')
