Exemple #1
0
 def cpuTick(self):
     # let's pretend the clock doesn't exist for now
     if self.nmiPending:
         self.interrupt(mem.VEC_NMI)
         self.nmiPending = False
     elif self.irqPending and not self.flag(FLAG_I):
         self.interrupt(mem.VEC_IRQ)
         self.irqPending = False
     # TODO also process RST here (if I feel like it)
     self.currentInstruction = self.PC
     instr = opc.instrFromAddr(self.PC, self)
     self.PC = instr.nextaddr
     # TODO this next line can't account for variable cycle counts
     self.excessCycles += instr.cycles
     instr.call(self)
     self.excessCycles += self.instructionCycleExtra
     self.instructionCycleExtra = 0
Exemple #2
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 def printState(self):
     print ("A = %02x X = %02x Y = %02x SP=%02x flags = %02x PC = %04x" %
            (self.reg_A, self.reg_X, self.reg_Y, self.SP, self.flags, self.PC))
     instr = opc.instrFromAddr(self.PC, self)
     print instr.disassemble()
Exemple #3
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# ROMFILE = 'instr_test-v4/official_only.nes'
# # unfortunately, the rom singles use unofficial instructions
# ROMFILE = 'instr_test-v4/rom_singles/02-implied.nes'
# STARTADDR = None

# ROMFILE = 'donkeykong.nes'
# STARTADDR = None

ROMFILE = 'smb.nes'
STARTADDR = None

nestestrom = rom.readRom(ROMFILE)
c = cpu.CPU(rom=nestestrom)
startaddr = c.mem.dereference(mem.VEC_RST)
startop = opc.instrFromAddr(startaddr, c)
firstops = opc.instrListFromAddr(startaddr, 50, c)
firstassem = "\n".join([op.disassemble() for op in firstops])

if STARTADDR is not None:
    c.PC = STARTADDR
c.printState()

def run(delay=0):
    instructions = 0
    try:
        while True:
            c.tick()
            instructions += 1
            time.sleep(delay)
    finally: