def test_ws_retrieve_data_on_input_ports(): pg = PortGraph() pg.add_vertex(0) pg.add_out_port(0, "out", 0) pg.add_vertex(1) pg.add_in_port(1, "in", 1) # non existing port ws = WorkflowState(pg) assert_raises(KeyError, lambda: ws.get(10)) # lonely input port without data ws = WorkflowState(pg) assert_raises(KeyError, lambda: ws.get(1)) # lonely input port with data ws.store_param(1, "param", 0) assert ws.get(1) == "param" # connected input port pg.connect(0, 1) ws = WorkflowState(pg) ws.store(0, "data") assert ws.get(1) == "data"
def test_portgraph_connected_edges(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() vid3 = pg.add_vertex() assert_raises(InvalidPort, lambda: tuple(pg.connected_edges(0))) pid1 = pg.add_in_port(vid1, 0) pid2 = pg.add_in_port(vid1, 1) pid3 = pg.add_out_port(vid2, 0) pid4 = pg.add_out_port(vid3, 0) # test vertices and ports are created without connections for pid in (pid1, pid2, pid3, pid4): assert len(tuple(pg.connected_edges(pid))) == 0 eid1 = pg.connect(pid3, pid1) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert tuple(pg.connected_edges(pid1)) == (eid1,) for pid in (pid2, pid4): assert len(tuple(pg.connected_edges(pid))) == 0 eid2 = pg.connect(pid4, pid1) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert tuple(pg.connected_edges(pid4)) == (eid2,) assert sorted(pg.connected_edges(pid1)) == sorted((eid1, eid2)) assert len(tuple(pg.connected_edges(pid2))) == 0 eid3 = pg.connect(pid4, pid2) assert tuple(pg.connected_edges(pid3)) == (eid1,) assert sorted(pg.connected_edges(pid4)) == sorted((eid2, eid3)) assert sorted(pg.connected_edges(pid1)) == sorted((eid1, eid2)) assert tuple(pg.connected_edges(pid2)) == (eid3,)
def test_evaluation_propagated_upstream(): visited = [] def func(txt): visited.append(txt) return txt pg = PortGraph() n = FuncNode(func) pg.add_actor(n, 0) pg.add_actor(n, 1) pg.connect(pg.out_port(0, 'txt'), pg.in_port(1, 'txt')) algo = BruteEvaluation(pg) ws = WorkflowState(pg) env = EvaluationEnvironment() ws.store_param(pg.in_port(0, 'txt'), "txt", 0) algo.eval(env, ws, 0) assert len(visited) == 1 algo.eval(env, ws, 1) assert len(visited) == 2 env.new_execution() algo.eval(env, ws, 1) assert len(visited) == 4
def test_ws_store_param_only_on_lonely_input_ports(): pg = PortGraph() pg.add_vertex(0) pg.add_in_port(0, "in", 0) pg.add_out_port(0, "out", 1) pg.add_vertex(1) pg.add_in_port(1, "in", 2) pg.connect(1, 2) ws = WorkflowState(pg) assert_raises(UserWarning, lambda: ws.store_param(1, "param", 0)) assert_raises(UserWarning, lambda: ws.store_param(2, "param", 0))
def test_ws_sub_ready_for_evaluation_if_no_input_port(): pg = PortGraph() pg.add_vertex(0) pg.add_out_port(0, "out", 0) pg.add_vertex(1) pg.add_in_port(1, "in", 1) pg.connect(0, 1) ws = WorkflowState(pg) assert ws.is_ready_for_evaluation() subpg = get_upstream_subportgraph(pg, 1) subws = WorkflowState(subpg) assert subws.is_ready_for_evaluation()
def test_portgraph_clear(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() pid1 = pg.add_in_port(vid1, "in") pid2 = pg.add_out_port(vid2, "out") pg.connect(pid2, pid1) pg.clear() assert pg.nb_vertices() == 0 assert pg.nb_edges() == 0 assert len(tuple(pg.ports())) == 0
def test_ws_retrieve_data_on_multiple_connections_input_ports(): pg = PortGraph() pg.add_vertex(0) pg.add_out_port(0, "out", 0) pg.add_vertex(1) pg.add_out_port(1, "out", 1) pg.add_vertex(2) pg.add_in_port(2, "in", 2) pg.connect(0, 2) pg.connect(1, 2) ws = WorkflowState(pg) assert_raises(KeyError, lambda: ws.get(2)) ws.store(0, "data0") assert_raises(KeyError, lambda: ws.get(2)) ws.store(1, "data1") assert tuple(ws.get(2)) == ("data0", "data1")
def test_portgraph_remove_port(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() pid1 = pg.add_in_port(vid1, "in") pid2 = pg.add_out_port(vid2, "out") pg.connect(pid2, pid1) # raise error if global port id dos not exist assert_raises(InvalidPort, lambda: pg.remove_port(pid1 + pid2 + 1)) pg.remove_port(pid1) assert len(tuple(pg.ports(vid1))) == 0 assert tuple(pg.ports(vid2)) == (pid2,) assert pg.nb_connections(pid2) == 0
def test_portgraph_remove_vertex(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() pid1 = pg.add_in_port(vid1, "in") pid2 = pg.add_out_port(vid2, "out") pg.connect(pid2, pid1) assert_raises(InvalidVertex, lambda: pg.remove_vertex(vid1 + vid2 + 1)) pg.remove_vertex(vid1) assert tuple(pg.ports()) == (pid2,) assert_raises(InvalidVertex, lambda: pg.ports(vid1).next()) assert tuple(pg.ports(vid2)) == (pid2,) assert pg.nb_connections(pid2) == 0 assert pg.nb_neighbors(vid2) == 0
def test_ws_is_ready_for_evaluation(): pg = PortGraph() pg.add_vertex(0) pg.add_in_port(0, "in", 0) pg.add_out_port(0, "out", 1) pg.add_vertex(1) pg.add_out_port(1, "out", 2) pg.add_vertex(2) pg.add_in_port(2, "in", 3) pg.add_out_port(2, "out", 4) pg.connect(1, 3) pg.connect(2, 3) ws = WorkflowState(pg) assert not ws.is_ready_for_evaluation() ws.store(1, "data") assert not ws.is_ready_for_evaluation() ws.store_param(0, "param", 0) assert ws.is_ready_for_evaluation()
def test_portgraph_connect(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() # invalid ports assert_raises(InvalidPort, lambda: pg.connect(0, 1)) # invalid source port pid1 = pg.add_in_port(vid1, "in") assert_raises(InvalidPort, lambda: pg.connect(pid1 + 1, pid1)) # invalid out port pid2 = pg.add_out_port(vid2, "out") assert_raises(InvalidPort, lambda: pg.connect(pid2, pid1 + pid2 + 1)) # edge connection from in to out raise error assert_raises(InvalidPort, lambda: pg.connect(pid1, pid2)) eid = pg.connect(pid2, pid1) assert pg.source_port(eid) == pid2 assert pg.target_port(eid) == pid1 assert tuple(pg.connected_edges(pid1)) == (eid,) assert tuple(pg.connected_edges(pid2)) == (eid,) assert pid1 in pg.connected_ports(pid2) assert pid2 in pg.connected_ports(pid1) # can not duplicate edge assert_raises(InvalidEdge, lambda: pg.connect(pid2, pid1, eid))
def portgraph_nb_connections(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() vid3 = pg.add_vertex() assert_raises(InvalidPort, lambda: pg.nb_connections(0)) pid1 = pg.add_in_port(vid1, 0) pid2 = pg.add_in_port(vid1, 1) pid3 = pg.add_out_port(vid2, 0) pid4 = pg.add_out_port(vid3, 0) for pid in (pid1, pid2, pid3, pid4): assert pg.nb_connections(pid) == 0 pg.connect(pid3, pid1) assert pg.nb_connections(pid3) == 1 assert pg.nb_connections(pid1) == 1 assert pg.nb_connections(pid2) == 0 assert pg.nb_connections(pid4) == 0 pg.connect(pid4, pid1) assert pg.nb_connections(pid3) == 1 assert pg.nb_connections(pid4) == 1 assert pg.nb_connections(pid1) == 2 assert pg.nb_connections(pid2) == 0 pg.connect(pid4, pid2) assert pg.nb_connections(pid3) == 1 assert pg.nb_connections(pid4) == 2 assert pg.nb_connections(pid1) == 2 assert pg.nb_connections(pid2) == 1
def test_portgraph_connected_ports(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() vid3 = pg.add_vertex() assert_raises(InvalidPort, lambda: tuple(pg.connected_ports(0))) pid1 = pg.add_in_port(vid1, 0) pid2 = pg.add_in_port(vid1, 1) pid3 = pg.add_out_port(vid2, 0) pid4 = pg.add_out_port(vid3, 0) for pid in (pid1, pid2, pid3, pid4): assert len(tuple(pg.connected_ports(pid))) == 0 pg.connect(pid3, pid1) assert tuple(pg.connected_ports(pid3)) == (pid1,) assert tuple(pg.connected_ports(pid1)) == (pid3,) for pid in (pid2, pid4): assert len(tuple(pg.connected_ports(pid))) == 0 pg.connect(pid4, pid1) assert tuple(pg.connected_ports(pid3)) == (pid1,) assert tuple(pg.connected_ports(pid4)) == (pid1,) assert sorted(pg.connected_ports(pid1)) == sorted((pid3, pid4)) assert len(tuple(pg.connected_ports(pid2))) == 0 pg.connect(pid4, pid2) assert tuple(pg.connected_ports(pid3)) == (pid1,) assert sorted(pg.connected_ports(pid4)) == sorted((pid1, pid2)) assert sorted(pg.connected_ports(pid1)) == sorted((pid3, pid4)) assert tuple(pg.connected_ports(pid2)) == (pid4,)
def test_portgraph_edge_connected_to_ports(): pg = PortGraph() vid1 = pg.add_vertex() vid2 = pg.add_vertex() # method add_edge is forbidden assert_raises(UserWarning, lambda: pg.add_edge((vid1, vid2))) # connect to None port raises InvalidPort assert_raises(InvalidPort, lambda: pg.connect(None, None)) pid1 = pg.add_out_port(vid1, "out") pid2 = pg.add_in_port(vid2, "in") assert_raises(InvalidPort, lambda: pg.connect(pid1, None)) assert_raises(InvalidPort, lambda: pg.connect(None, pid2)) # connect from in port to out port raises InvalidPort assert_raises(InvalidPort, lambda: pg.connect(pid2, pid1)) # test connect is working eid = pg.connect(pid1, pid2) assert pg.source_port(eid) == pid1 assert pg.target_port(eid) == pid2
def test_ws_when_connected_input_port(): pg = PortGraph() pg.add_vertex(0) pg.add_out_port(0, "out", 0) pg.add_vertex(1) pg.add_out_port(1, "out", 1) pg.add_vertex(2) pg.add_in_port(2, "in", 2) pg.connect(0, 2) ws = WorkflowState(pg) assert ws.when(2) is None ws.set_last_evaluation(0, 10) assert ws.when(2) == 10 pg.connect(1, 2) ws = WorkflowState(pg) assert ws.when(2) is None ws.set_last_evaluation(0, 10) assert ws.when(2) is None ws.set_last_evaluation(1, 11) assert ws.when(2) == 10
def test_portgraph_big(): pg = PortGraph() vid1 = pg.add_vertex() pid11 = pg.add_out_port(vid1, "out") vid2 = pg.add_vertex() pid21 = pg.add_out_port(vid2, "out") vid3 = pg.add_vertex() pid31 = pg.add_in_port(vid3, "in1") pid32 = pg.add_in_port(vid3, "in2") pid33 = pg.add_out_port(vid3, "res") vid4 = pg.add_vertex() pid41 = pg.add_in_port(vid4, "in") eid1 = pg.connect(pid11, pid31) eid2 = pg.connect(pid21, pid32) pg.connect(pid33, pid41) assert pg.source_port(eid1) == pid11 assert pg.target_port(eid2) == pid32 assert set(pg.out_ports(vid1)) == {pid11} assert set(pg.in_ports(vid3)) == {pid31, pid32} assert set(pg.ports(vid3)) == {pid31, pid32, pid33} assert pg.is_in_port(pid31) assert pg.is_out_port(pid11) assert pg.vertex(pid11) == vid1 assert set(pg.connected_ports(pid11)) == {pid31} assert set(pg.connected_edges(pid21)) == {eid2} assert pg.out_port(vid1, "out") == pid11 assert pg.in_port(vid3, "in1") == pid31 assert_raises(InvalidPort, lambda: pg.connect(pid11, pid33)) pg.remove_port(pid33) assert set(pg.connected_ports(pid41)) == set() assert set(pg.out_edges(vid3)) == set() assert_raises(InvalidPort, lambda: pg.is_in_port(pid33))
def test_ws_dos_not_allow_graph_editing(): pg = PortGraph() ws = WorkflowState(pg) assert ws.portgraph_still_valid() pg.add_vertex(0) assert not ws.portgraph_still_valid() ws = WorkflowState(pg) assert ws.portgraph_still_valid() pg.add_out_port(0, "out", 0) assert not ws.portgraph_still_valid() pg.add_vertex(1) pg.add_in_port(1, "in", 1) ws = WorkflowState(pg) assert ws.portgraph_still_valid() pg.connect(0, 1) assert not ws.portgraph_still_valid() ws = WorkflowState(pg) assert ws.portgraph_still_valid() pg.remove_port(0) assert not ws.portgraph_still_valid()
def get_pg(): pg = PortGraph() pg.add_vertex(0) pg.add_out_port(0, "out", 0) pg.add_vertex(1) pg.add_out_port(1, "out", 1) pg.add_vertex(2) pg.add_in_port(2, "in1", 2) pg.add_in_port(2, "in2", 3) pg.add_out_port(2, "res", 4) pg.add_vertex(3) pg.add_in_port(3, "in", 5) pg.add_vertex(4) pg.add_out_port(4, "out", 6) pg.connect(0, 2, 0) pg.connect(1, 3, 1) pg.connect(4, 5, 2) pg.connect(6, 3, 3) return pg