def predict_hash(cls, design_builders, simulation_builders, parameters,
temp_directory, directory):
'''
Get the project hash for the project that these builders would create.
Args:
`design_builders`: The builders responsible for the synthesizable code.
`simulation_builders`: The builders responsible for the simulation code.
`parameters`: Top level parameters used to generated the design.
`temp_directory`: We temporary directory where we'll generate the files
so we can work out the hash.
`directory`: The real project location. This is required since some
simulation files may need this information.
'''
# Make a new directory for temporary files.
if os.path.exists(temp_directory):
shutil.rmtree(temp_directory)
os.makedirs(temp_directory)
# Build all the required files.
design_requirements = builder.build_all(
temp_directory, top_builders=design_builders, top_params=parameters)
simulation_requirements = builder.build_all(
temp_directory, top_builders=simulation_builders,
top_params=parameters, false_directory=directory)
# Work out what IP blocks are required.
ips = builder.condense_ips(
design_requirements['ips'] + simulation_requirements['ips'])
# And generate the hash.
new_hash = cls.hash(
design_files=design_requirements['filenames'],
simulation_files=simulation_requirements['filenames'],
ips=ips)
return new_hash
def create(cls,
design_builders,
simulation_builders,
parameters,
directory,
tasks_collection=None,
part=None,
board='',
top_module=''):
'''
Create a new Vivado project from `Builder`'s specifying the top level
modules. Spawns a Viavdo process to create the project and returns a
python wrapper around the process while that process is still running in
the background.
Args:
`design_builders`: The builders responsible for the synthesizable code.
`simulation_builders`: The builders responsible for the simulation code.
`parameters`: Top level parameters used to generated the design. Must include
'factory_name' which will be used to find the `interface` for test bench
projects that read the parameters and the `comm` for fpga projects.
`temp_directory`: We temporary directory where we'll generate the files
so we can work out the hash.
`directory`: The real project location. This is required since some
simulation files may need this information.
`tasks_collection`: How we keep track of Vivado processes.
`part`: The 'part' to use when implementing.
`board`: The 'board' to use when implementing.
`top_module`: The top level module in the design.
'''
cls.write_params(params=parameters, directory=directory)
design_requirements = builder.build_all(directory,
top_builders=design_builders,
top_params=parameters)
simulation_requirements = builder.build_all(
directory, top_builders=simulation_builders, top_params=parameters)
ips = builder.condense_ips(design_requirements['ips'] +
simulation_requirements['ips'])
p = super().create(
directory=directory,
design_files=design_requirements['filenames'],
simulation_files=simulation_requirements['filenames'],
tasks_collection=tasks_collection,
ips=ips,
board=board,
part=part,
top_module=top_module,
)
return p
def create(cls, design_builders, simulation_builders, parameters, directory,
tasks_collection=None, part=None, board='', top_module=''):
'''
Create a new Vivado project from `Builder`'s specifying the top level
modules. Spawns a Viavdo process to create the project and returns a
python wrapper around the process while that process is still running in
the background.
Args:
`design_builders`: The builders responsible for the synthesizable code.
`simulation_builders`: The builders responsible for the simulation code.
`parameters`: Top level parameters used to generated the design. Must include
'factory_name' which will be used to find the `interface` for test bench
projects that read the parameters and the `comm` for fpga projects.
`temp_directory`: We temporary directory where we'll generate the files
so we can work out the hash.
`directory`: The real project location. This is required since some
simulation files may need this information.
`tasks_collection`: How we keep track of Vivado processes.
`part`: The 'part' to use when implementing.
`board`: The 'board' to use when implementing.
`top_module`: The top level module in the design.
'''
cls.write_params(params=parameters, directory=directory)
design_requirements = builder.build_all(
directory, top_builders=design_builders, top_params=parameters)
simulation_requirements = builder.build_all(
directory, top_builders=simulation_builders, top_params=parameters)
ips = builder.condense_ips(
design_requirements['ips'] + simulation_requirements['ips'])
p = super().create(
directory=directory,
design_files=design_requirements['filenames'],
simulation_files=simulation_requirements['filenames'],
tasks_collection=tasks_collection,
ips=ips,
board=board,
part=part,
top_module=top_module,
)
return p
def make_directory(interface, directory, data):
external_dir = os.path.join(directory, 'external')
if os.path.exists(external_dir):
raise ValueError('Directory {} already exists.'.format(external_dir))
sim_dir = os.path.join(external_dir, 'sim')
synth_dir = os.path.join(external_dir, 'synth')
os.makedirs(external_dir)
os.makedirs(sim_dir)
os.makedirs(synth_dir)
interface.write_input_file(
data, os.path.join(sim_dir, 'input.data'))
inner_wrapper_builder = inner_wrapper.InnerWrapperBuilder({
'interface': interface,
})
file_testbench_builder = file_testbench.FileTestbenchBuilder({
'interface': interface,
})
interface.parameters['factory_name'] = interface.factory_name
design_builders = [inner_wrapper_builder, interface.builder]
simulation_builders = [file_testbench_builder,]
design_requirements = builder.build_all(
sim_dir, top_builders=design_builders, top_params=interface.parameters)
simulation_requirements = builder.build_all(
sim_dir, top_builders=simulation_builders, top_params=interface.parameters)
ips = builder.condense_ips(
design_requirements['ips'] + simulation_requirements['ips'])
design_files = design_requirements['filenames']
simulation_files = simulation_requirements['filenames']
for fn in design_files:
head, tail = os.path.split(fn)
shutil.copyfile(fn, os.path.join(synth_dir, tail))
if head == sim_dir:
os.remove(fn)
for fn in simulation_files:
head, tail = os.path.split(fn)
if head != sim_dir:
shutil.copyfile(fn, os.path.join(sim_dir, tail))
def predict_hash(cls, design_builders, simulation_builders, parameters,
temp_directory, directory):
'''
Get the project hash for the project that these builders would create.
Args:
`design_builders`: The builders responsible for the synthesizable code.
`simulation_builders`: The builders responsible for the simulation code.
`parameters`: Top level parameters used to generated the design.
`temp_directory`: We temporary directory where we'll generate the files
so we can work out the hash.
`directory`: The real project location. This is required since some
simulation files may need this information.
'''
# Make a new directory for temporary files.
if os.path.exists(temp_directory):
shutil.rmtree(temp_directory)
os.makedirs(temp_directory)
# Build all the required files.
design_requirements = builder.build_all(temp_directory,
top_builders=design_builders,
top_params=parameters)
simulation_requirements = builder.build_all(
temp_directory,
top_builders=simulation_builders,
top_params=parameters,
false_directory=directory)
# Work out what IP blocks are required.
ips = builder.condense_ips(design_requirements['ips'] +
simulation_requirements['ips'])
# And generate the hash.
new_hash = cls.hash(
design_files=design_requirements['filenames'],
simulation_files=simulation_requirements['filenames'],
ips=ips)
return new_hash