def _generate_latex_source(circuit, filename=None, scale=0.7, style=None, reverse_bits=False, plot_barriers=True): """Convert QuantumCircuit to LaTeX string. Args: circuit (QuantumCircuit): input circuit scale (float): image scaling filename (str): optional filename to write latex style (dict or str): dictionary of style or file name of style file reverse_bits (bool): When set to True reverse the bit order inside registers for the output visualization. plot_barriers (bool): Enable/disable drawing barriers in the output circuit. Defaults to True. Returns: str: Latex string appropriate for writing to file. """ qregs, cregs, ops = _utils._get_instructions(circuit, reversebits=reverse_bits) qcimg = _latex.QCircuitImage(qregs, cregs, ops, scale, style=style, plot_barriers=plot_barriers, reverse_bits=reverse_bits) latex = qcimg.latex() if filename: with open(filename, 'w') as latex_file: latex_file.write(latex) return latex
def _text_circuit_drawer(circuit, filename=None, line_length=None, reversebits=False, plotbarriers=True): """ Draws a circuit using ascii art. Args: circuit (QuantumCircuit): Input circuit filename (str): optional filename to write the result line_length (int): Optional. Breaks the circuit drawing to this length. This useful when the drawing does not fit in the console. If None (default), it will try to guess the console width using shutil.get_terminal_size(). If you don't want pagination at all, set line_length=-1. reversebits (bool): Rearrange the bits in reverse order. plotbarriers (bool): Draws the barriers when they are there. Returns: TextDrawing: An instances that, when printed, draws the circuit in ascii art. """ qregs, cregs, ops = _utils._get_instructions(circuit, reversebits=reversebits) text_drawing = _text.TextDrawing(qregs, cregs, ops) text_drawing.plotbarriers = plotbarriers text_drawing.line_length = line_length if filename: text_drawing.dump(filename) return text_drawing
def test_get_instructions(self): """ _get_instructions without reversebits """ (qregs, cregs, ops) = _utils._get_instructions(self.dag) self.assertEqual([('qr2', 1), ('qr2', 0), ('qr1', 1), ('qr1', 0)], qregs) self.assertEqual([('cr2', 1), ('cr2', 0), ('cr1', 1), ('cr1', 0)], cregs) self.assertEqual(['cx', 'measure', 'cx', 'measure', 'cx', 'measure', 'cx', 'measure'], [op['name'] for op in ops]) self.assertEqual([[('qr2', 0), ('qr2', 1)], [('qr2', 0)], [('qr2', 1), ('qr2', 0)], [('qr2', 1)], [('qr1', 0), ('qr1', 1)], [('qr1', 0)], [('qr1', 1), ('qr1', 0)], [('qr1', 1)]], [op['qargs'] for op in ops]) self.assertEqual([[], [('cr2', 0)], [], [('cr2', 1)], [], [('cr1', 0)], [], [('cr1', 1)]], [op['cargs'] for op in ops])
def test_get_instructions(self): """ _get_instructions without reversebits """ (qregs, cregs, ops) = _utils._get_instructions(self.circuit) self.assertEqual([(self.qr1, 0), (self.qr1, 1), (self.qr2, 0), (self.qr2, 1)], qregs) self.assertEqual([(self.cr1, 0), (self.cr1, 1), (self.cr2, 0), (self.cr2, 1)], cregs) self.assertEqual([op['name'] for op in ops], [ 'cx', 'measure', 'cx', 'measure', 'cx', 'measure', 'cx', 'measure' ]) self.assertEqual([op['qargs'] for op in ops], [[ (self.qr2, 0), (self.qr2, 1) ], [(self.qr2, 0)], [(self.qr2, 1), (self.qr2, 0)], [ (self.qr2, 1) ], [(self.qr1, 0), (self.qr1, 1)], [(self.qr1, 0)], [(self.qr1, 1), (self.qr1, 0)], [(self.qr1, 1)]]) self.assertEqual([op['cargs'] for op in ops], [[], [(self.cr2, 0)], [], [(self.cr2, 1)], [], [(self.cr1, 0)], [], [(self.cr1, 1)]])
def parse_circuit(self, circuit): qregs, cregs, ops = _utils._get_instructions( circuit, reversebits=self.reverse_bits) self._registers(cregs, qregs) self._ops = ops
def test_get_instructions_reversebits(self): """ _get_instructions with reversebits=True """ (qregs, cregs, _) = _utils._get_instructions(self.dag, reversebits=True) self.assertEqual([('qr1', 0), ('qr1', 1), ('qr2', 0), ('qr2', 1)], qregs) self.assertEqual([('cr1', 0), ('cr1', 1), ('cr2', 0), ('cr2', 1)], cregs)