def easyCheck(idx, mode=1):
idy = idx % 10
xList = VList if idx < 10 else IList
dir1 = '../data/DAC/'
dir2 = get_default_fig_dir()
showDAC(dir1 + 'DAC_chip5_scan{0:d}.dat'.format(idx),
xList[idy][0],
dir2 + xList[idy][0],
mode=mode)
#!/usr/bin/env python
# from ROOT import TGraphErrors, TFile, TTree, gDirectory, TGraph2D, TIter
from ROOT import *
from glob import glob
import os, re
from rootUtil import waitRootCmdX, useNxStyle, get_default_fig_dir
from rootHelper import getRDF
sDir = get_default_fig_dir()
sTag = 'test1_'
def create_calibration_file2(infiles='data/fpgaLin/sp01a_Feb26b_*mV_f1000.dat',
outfile='fout_calib1.root'):
'''Create a root file that contains a TF1 and a TGraph to map the measured voltage to the number of electron'''
nCh = 20
gr0 = [TGraphErrors() for j in range(nCh)]
grs = [TGraphErrors() for j in range(nCh)]
gEs = [TGraphErrors() for j in range(nCh)]
vx = [(int(os.path.basename(fname).split('_')[-2][:-2]), fname)
for fname in glob(infiles)]
h_quality = TGraph2D()
h_ENC = TGraph2D()
fout = TFile(outfile, 'recreate')
# d0,ch0 = getRDF(infiles, treename='tup1')
#
# h0 = d0.Histo1D('A')
# h0.Draw()
def test1():
dir1 = '../data/DAC/'
dir2 = get_default_fig_dir()
# showDAC(dir1+'DAC_chip5_scan10.dat', IList[0][1])
showDAC(dir1 + 'DAC_chip5_scan0.dat', VList[0][1], dir2 + VList[0][1])
#!/usr/bin/env python
import os, sys, re
from ROOT import *
from rootUtil import useAtlasStyle, waitRootCmd, savehistory, get_default_fig_dir, useStyle1, useStyle2, useStyle
gROOT.LoadMacro('AtlasLabels.C')
from ROOT import ATLASLabel
funlist=[]
sDir = get_default_fig_dir()
sDirirectly=False
def makeChain(files, treename='tree2'):
ch1 = TChain(treename)
ch1.Add(files)
return ch1
def logAxis(h1):
if h1.GetTitle().find('_logy')!=-1:
gPad.SetLogy()
else: gPad.SetLogy(False)
if h1.GetTitle().find('_logx')!=-1:
gPad.SetLogx()
else: gPad.SetLogx(False)
class plotMakerBase():
def __init__(self):
self.autoSave = sDirirectly
self.sTag = 'pmTest_'
