def main():
valid_keys = set(
[
"payload_generator", "payload_generator_config", "inversion_divisor", "inversion_mask",
"row_pattern"
])
parser = argparse.ArgumentParser()
parser.add_argument("config_file", type=open)
args = parser.parse_args()
config_string = ""
config_lines = args.config_file.readlines()
for line in config_lines:
index = line.find('#')
if index >= 0:
line = line[0:index]
line += '\n'
config_string += line
config = json.loads(config_string)
assert validate_keys(config, valid_keys)
args.config_file.close()
pg = PayloadGenerator.get_by_name(config["payload_generator"])
pg.initialize(config)
wb = RemoteClient()
wb.open()
settings = get_litedram_settings()
inversion_divisor = 0
inversion_mask = 0
inversion_divisor = config.get("inversion_divisor", 0)
inversion_mask = int(config.get("inversion_mask", "0"), 0)
row_pattern = config.get("row_pattern", 0)
setup_inverters(wb, inversion_divisor, inversion_mask)
while not pg.done():
offset, size = pg.get_memset_range(wb, settings)
hw_memset(wb, offset, size, [row_pattern])
converter = DRAMAddressConverter.load()
bank = 0
sys_clk_freq = float(get_generated_defs()['SYS_CLK_FREQ'])
payload = pg.get_payload(
settings=settings,
bank=bank,
payload_mem_size=wb.mems.payload.size,
sys_clk_freq=sys_clk_freq)
execute_payload(wb, payload)
offset, size = pg.get_memtest_range(wb, settings)
errors = hw_memtest(wb, offset, size, [row_pattern])
row_errors = decode_errors(wb, settings, converter, bank, errors)
pg.process_errors(settings, row_errors)
pg.summarize()
wb.close()
def check_errors(wb, settings, converter, bank, row_pattern):
dma_data_width = settings.phy.dfi_databits * settings.phy.nphases
dma_data_bytes = dma_data_width // 8
errors = hw_memtest(wb, 0x0, wb.mems.main_ram.size, [row_pattern])
row_errors = defaultdict(list)
for e in errors:
addr = wb.mems.main_ram.base + e.offset * dma_data_bytes
bank, row, col = converter.decode_bus(addr)
base_addr = min(addresses_per_row(settings, converter, bank, row))
row_errors[row].append(((addr - base_addr) // 4, e.data, e.expected))
return dict(row_errors)
print('dbg: offset: ' + str(offset))
wb.write(mem_base + offset,
wb.read(mem_base + offset) ^ 0x000010000)
print()
# Corner case
#offsets.append((mem_range - 4)//16)
#wb.write(mem_base + mem_range - 4, wb.read(mem_base + mem_range - 4) ^ 0x00100000)
#if args.dbg:
# print('dbg: 0x{:08x}: 0x{:08x}'.format(mem_base + mem_range - 4, wb.read(mem_base + mem_range - 4)))
print('dbg: offsets: {:d}'.format(len(offsets)))
# --------------------------------------------------------------------
start_time = time.time()
errors = hw_memtest(wb, 0x0, mem_range, [0xffffffff], args.dbg)
end_time = time.time()
if args.dbg:
print('dbg: errors: {:d}, offsets: {:d}'.format(
len(errors), len(offsets)))
print('dbg: errors: {:d}, offsets: {:d}'.format(
len(errors), len(offsets)))
if len(errors) != len(offsets):
missing = []
for off in offsets:
if off not in [e.offset for e in errors]:
missing.append(off)
for off in missing:
def runner():
if is_write:
hw_memset(wb, 0, n, pattern)
else:
hw_memtest(wb, 0, n, pattern)