def ParityError(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg_rx = Config(parity=ODD)
cfg_tx = Config(parity=EVEN)
data = intbv(randrange(256))
yield join(rs232_tx(tx, data, cfg_tx), rs232_rx(rx, actual, cfg_rx))
def ParityError(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg_rx = Config(parity=ODD)
cfg_tx = Config(parity=EVEN)
data = intbv(randrange(256))
yield join(rs232_tx(tx, data, cfg_tx), rs232_rx(rx, actual, cfg_rx))
def oddParity(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg = Config(parity=ODD)
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg), rs232_rx(rx, actual, cfg))
self.assertEqual(data, actual)
def oddParity(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg = Config(parity=ODD)
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg), rs232_rx(rx, actual, cfg))
self.assertEqual(data, actual)
def sevenBitsEvenParity(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg = Config(parity=EVEN, n_bits=7)
cfg_rx = Config(parity=EVEN, n_bits=7)
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg), rs232_rx(rx, actual, cfg_rx))
self.assertEqual(data, actual)
def sevenBitsEvenParity(self):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg = Config(parity=EVEN, n_bits=7)
cfg_rx = Config(parity=EVEN, n_bits=7)
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg), rs232_rx(rx, actual, cfg_rx))
self.assertEqual(data, actual)
def bench(self, tx_baud_rate):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg_tx = Config(baud_rate=tx_baud_rate)
cfg_rx = Config()
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg_tx), rs232_rx(rx, actual, cfg_rx))
if not data == actual:
raise Error
def bench(self, tx_baud_rate):
tx = Signal(intbv(0))
rx = tx
actual = intbv(0)
cfg_tx = Config(baud_rate=tx_baud_rate)
cfg_rx = Config()
for i in range(256):
data = intbv(i)
yield join(rs232_tx(tx, data, cfg_tx), rs232_rx(rx, actual, cfg_rx))
if not data == actual:
raise Error
