def jp_a16():
cpu.add_ticks(16)
lower = memory.read(cpu.registers.PC)
upper = memory.read(cpu.registers.PC+1)
jaddress = (upper << 8) | (lower & 0xFF)
cpu.registers.PC = jaddress
return
def test_cart():
cart.loadCart('sml.gb')
# All carts should have this in their header(amongst other things)
eq_(memory.read(0x100), 0x00)
eq_(memory.read(0x101), 0xC3)
eq_(memory.read(0x102), 0x50)
eq_(memory.read(0x103), 0x01)
def test_jmp():
# write address 0xC005
memory.write(0xC000, 0x05)
memory.write(0xC001, 0xC0)
eq_(memory.read(0xC000), 0x05)
eq_(memory.read(0xC001), 0xC0)
cpu.registers.PC = 0xC000
instructions.jp_a16()
eq_(cpu.registers.PC, 0xC005)
def test_iHL(): cpu.registers.HL = 0xC000 memory.write(0xC000,0x54) eq_(cpu.registers.iHL, 0x54) cpu.registers.iHL = 0x32 eq_(memory.read(0xC000), 0x32)
def doInstruction():
opcode = memory.read(registers.PC)
registers.PC += 1
if opcode in operations:
print "Instruction: %s (%x)" % (operations[opcode].__name__, opcode)
operations[opcode]()
else:
raise NotImplementedError("Instruction 0x%x not implemented"%opcode)
def helper():
cpu.add_ticks(8)
# memory access costs 4 ticks more
if opcode == 0x36:
cpu.add_ticks(4)
# get the register, and read in the opcode 'argument'
reg = _d8regmap[opcode]
cpu.registers[reg] = memory.read(cpu.registers.PC +1)
cpu.registers.PC += 1
def ldh_a_n():
cpu.add_ticks(12)
n = memory.read(cpu.registers.PC)
cpu.registers.PC += 1
cpu.registers.A = memory.read(0xFF00+n)
def ldh_n_a():
cpu.add_ticks(12)
n = memory.read(cpu.registers.PC)
cpu.registers.PC += 1
memory.write(0xFF00+n, cpu.registers.A)
def ld_a_ic(): # ld A,(C)
cpu.add_ticks(8)
cpu.registers.A = memory.read(0xFF00 + cpu.registers.C)
def get(self):
return memory.read(reg.fget(None))
