def _generate_all_terminal_nodes(self, vtree: Vtree):
if vtree.is_leaf():
var_index = vtree.var
self._precreated_terminal_nodes[var_index - 1] = CircuitTerminal(
self._largest_index,
vtree,
var_index,
LITERAL_IS_TAUTOLOGY,
np.random.random_sample(size=(self._num_classes, )),
)
self._largest_index += 1
self._precreated_terminal_nodes[self._num_variables + var_index -
1] = CircuitTerminal(
self._largest_index, vtree,
var_index, LITERAL_IS_TRUE,
np.random.random_sample(size=(
self._num_classes, )))
self._largest_index += 1
self._precreated_terminal_nodes[2 * self._num_variables +
var_index - 1] = CircuitTerminal(
self._largest_index, vtree,
var_index, LITERAL_IS_FALSE,
np.random.random_sample(size=(
self._num_classes, )))
self._largest_index += 1
else:
self._generate_all_terminal_nodes(vtree.left)
self._generate_all_terminal_nodes(vtree.right)
def _generate_all_terminal_nodes(self, vtree: Vtree):
if vtree.is_leaf():
var_index = vtree.var
# CircuitTerminal(self._largest_index, vtree, var_index, LITERAL_IS_TRUE,
# np.random.random_sample(size=(self._num_classes,)))
self._terminal_nodes[var_index - 1] = CircuitTerminal(
self._largest_index, vtree, var_index, LITERAL_IS_TRUE,
self.rand_gen.random_sample(size=1)
# np.random.random_sample(
# size=1)
)
self._largest_index += 1
# CircuitTerminal(self._largest_index, vtree, var_index, LITERAL_IS_FALSE,
# np.random.random_sample(size=(self._num_classes,)))
self._terminal_nodes[self._num_variables +
var_index - 1] = CircuitTerminal(
self._largest_index, vtree, var_index,
LITERAL_IS_FALSE,
self.rand_gen.random_sample(size=1)
# np.random.random_sample(
# size=1)
)
self._largest_index += 1
else:
self._generate_all_terminal_nodes(vtree.left)
self._generate_all_terminal_nodes(vtree.right)
def load(self, f):
# read the format at the beginning
line = f.readline()
while line[0] == "c":
line = f.readline()
# serialize the vtree
vtree_nodes = dict()
unvisited_vtree_nodes = deque()
unvisited_vtree_nodes.append(self._vtree)
while len(unvisited_vtree_nodes):
node = unvisited_vtree_nodes.popleft()
vtree_nodes[node.index] = node
if not node.is_leaf():
unvisited_vtree_nodes.append(node.left)
unvisited_vtree_nodes.append(node.right)
# extract the saved logistic circuit
nodes = dict()
line = f.readline()
while line[0] == "T" or line[0] == "F":
line_as_list = line.strip().split(" ")
positive_literal, var = (line_as_list[0] == "T"), int(
line_as_list[3])
index, vtree_index = int(line_as_list[1]), int(line_as_list[2])
parameters = []
for i in range(self._num_classes):
parameters.append(float(line_as_list[4 + i]))
parameters = np.array(parameters, dtype=np.float64)
if positive_literal:
nodes[index] = (CircuitTerminal(index,
vtree_nodes[vtree_index], var,
LITERAL_IS_TRUE,
parameters), {var})
else:
nodes[index] = (CircuitTerminal(index,
vtree_nodes[vtree_index], var,
LITERAL_IS_FALSE,
parameters), {-var})
self._largest_index = max(self._largest_index, index)
line = f.readline()
self._terminal_nodes = [x[0] for x in nodes.values()]
self._terminal_nodes.sort(key=lambda x: (-x.var_value, x.var_index))
if len(self._terminal_nodes) != 2 * self._num_variables:
raise ValueError(
"Number of terminal nodes recorded in the circuit file "
"does not match 2 * number of variables in the provided vtree."
)
root = None
while line[0] == "D":
line_as_list = line.strip().split(" ")
index, vtree_index, num_elements = int(line_as_list[1]), int(
line_as_list[2]), int(line_as_list[3])
elements = []
variables = set()
for i in range(num_elements):
prime_index = int(line_as_list[i * (self._num_classes + 2) +
4].strip("("))
sub_index = int(line_as_list[i * (self._num_classes + 2) + 5])
element_variables = nodes[prime_index][1].union(
nodes[sub_index][1])
variables = variables.union(element_variables)
splittable_variables = set()
for variable in element_variables:
if -variable in element_variables:
splittable_variables.add(abs(variable))
parameters = []
for j in range(self._num_classes):
parameters.append(
float(line_as_list[i * (self._num_classes + 2) + 6 +
j].strip(")")))
parameters = np.array(parameters, dtype=np.float64)
elements.append(
AndGate(nodes[prime_index][0], nodes[sub_index][0],
parameters))
elements[-1].splittable_variables = splittable_variables
nodes[index] = (OrGate(index, vtree_nodes[vtree_index],
elements), variables)
root = nodes[index][0]
self._largest_index = max(self._largest_index, index)
line = f.readline()
if line[0] != "B":
raise ValueError(
"The last line in a circuit file must record the bias parameters."
)
self._bias = np.array([float(x) for x in line.strip().split(" ")[1:]],
dtype=np.float64)
gc.collect()
return root