def init_board(library, deviceaddress, xmlfile):
global board
uhal.setLogLevelTo(uhal.LogLevel.INFO)
board = uhal.getDevice("glib",
"ipbusudp-2.0://" + deviceaddress + ":50001",
"file://" + xmlfile)
board.getClient().setTimeoutPeriod(10000)
nodeslist = board.getNodes()
deletelist = []
return nodeslist
def Generate_VHDL(name, XMLFile, HDLPath, map_template_file, pkg_template_file,
useUhal):
print("Generate VHDL for", name, "from", XMLFile)
# get working directory
wd = os.getcwd()
# move into the output HDL directory
os.chdir(wd + "/" + HDLPath)
# make a symlink to the XML file
fullXMLFile = wd + "/" + XMLFile
# generate a fake top address table
slaveAddress = "0x" + hex(0x00000000)[2:]
topXMLFile = "top.xml"
outXMLFile = open(topXMLFile, 'w')
outXMLFile.write("<?xml version=\"1.0\" encoding=\"ISO-8859-1\"?>\n")
outXMLFile.write("<node id=\"TOP\">\n")
outXMLFile.write(" <node id=\"" + name + "\" module=\"file://" +
fullXMLFile + "\" address=\"" + slaveAddress +
"\"/>\n")
outXMLFile.write("</node>\n")
outXMLFile.close()
# generate the VHDL
if useUhal:
try:
import uhal
device = uhal.getDevice("dummy", "ipbusudp-1.3://localhost:12345",
"file://" + topXMLFile)
for i in device.getNodes():
if i.count('.') == 0:
mytree = tree(device.getNode(i), log)
mytree.generatePkg()
mytree.generateRegMap(regMapTemplate=wd + "/" +
map_template_file)
except ImportError:
print("uhal is not installed")
else:
root = ParserNode(name='TOP')
buildTree(root, topXMLFile, init=True)
for child in root.getChildren():
child.setParent(None)
mytree = tree(child)
mytree.generatePkg()
mytree.generateRegMap()
child.setParent(root)
# cleanup
os.remove(topXMLFile)
os.chdir(wd) # go back to original path
def __init__(self,
name="my_device",
ipb_path="ipbusudp-2.0://192.168.0.10:50001",
adr_table="../module_test_fw/address_tables/etl_test_fw.xml",
dummy=False):
uhal.disableLogging()
if not dummy:
self.hw = uhal.getDevice("my_device", ipb_path, "file://" + adr_table)
else:
self.hw = None
self.readout_boards = []
self.auto_dispatch = True # default -> True
def GetUhalDevice(LogLevel = uhal.LogLevel.WARNING):
uhal.setLogLevelTo(LogLevel)
global uhalDevice
if uhalDevice == 0:
f = "addresses.xml"
if not FileExists(f):
f = "common/addresses.xml"
if not FileExists(f):
f = "../common/addresses.xml"
if not FileExists(f):
print Error_("Could not find file \"addresses.xml\"")
raise
uhalDevice = uhal.getDevice("fpga", "ipbusudp-2.0://134.158.152.64:50001", "file://"+f)
# print "Creating device"
return uhalDevice
def useUhalParser(test_xml, HDLPath, regMapTemplate, pkgTemplate="",
verbose=False, debug=False, yml2hdl=False):
# configure logger
global log
log = logging.getLogger("main")
formatter = logging.Formatter('%(name)s %(levelname)s: %(message)s')
handler = logging.StreamHandler(sys.stdout)
handler.setFormatter(formatter)
log.addHandler(handler)
log.setLevel(logging.WARNING)
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
if verbose:
log.setLevel(logging.INFO)
uhal.setLogLevelTo(uhal.LogLevel.INFO)
if debug:
log.setLevel(logging.DEBUG)
uhal.setLogLevelTo(uhal.LogLevel.DEBUG)
try:
device = uhal.getDevice(
"dummy", "ipbusudp-1.3://localhost:12345", "file://" + test_xml)
except Exception:
raise Exception(
"File '%s' does not exist or has incorrect format" % test_xml)
if not os.path.exists(HDLPath):
os.makedirs(HDLPath)
cwd = os.getcwd()
os.chdir(os.path.abspath(HDLPath))
for i in device.getNodes():
if i.count('.') == 0:
mytree = tree.tree(device.getNode(i), log, yml2hdl=yml2hdl)
mytree.generatePkg()
mytree.generateRegMap(regMapTemplate=regMapTemplate)
# test array-type
# findArrayType(mytree.root)
os.chdir(cwd)
def __init__(self, slot, links):
self.slot = 160+slot
self.links = links
self.oh_control_link = links[links.keys()[0]]
self.glib_control_link = links.keys()[0]
ipaddr = '192.168.0.%d'%(self.slot)
#address_table = "file://${BUILD_HOME}/data/testbeam_registers.xml"
address_table = "file://${BUILD_HOME}/data/full_system_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/glib_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/optohybrid_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/geb_vfat_address_table.xml"
uri = "chtcp-2.0://localhost:10203?target=%s:50001"%(ipaddr)
self.glib = uhal.getDevice( "glib" , uri, address_table )
#self.glib_base = self.glib.getNode("GLIB.GLIB")
#self.oh_base = self.glib.getNode("OptoHybrid.OptoHybrid")
#self.vfat_base = self.glib.getNode("OptoHybrid.OptoHybrid.GEB.VFATS")
self.printInfo(self.vfat_base)
self.printInfo(self.glib_base)
self.printInfo(self.oh_base)
self.printInfo("OptoHybrid.OptoHybrid.OptoHybrid_LINKS.LINK1.CLOCKING.VFAT.SOURCE" in self.glib.getNodes())
def GenerateHDL(name, XMLFile, HDLPath):
print "Generate HDL for", name, "from", XMLFile
#get working directory
wd = os.getcwd()
#move into the output HDL directory
os.chdir(wd + "/" + HDLPath)
#make a symlink to the XML file
fullXMLFile = wd + "/" + XMLFile
#generate a fake top address table
slaveAddress = "0x" + hex(0x00000000)[2:]
topXMLFile = "top.xml"
outXMLFile = open(topXMLFile, 'w')
outXMLFile.write("<?xml version=\"1.0\" encoding=\"ISO-8859-1\"?>\n")
outXMLFile.write("<node id=\"TOP\">\n")
outXMLFile.write(" <node id=\"" + name + "\" module=\"file://" +
fullXMLFile + "\" address=\"" + slaveAddress +
"\"/>\n")
outXMLFile.write("</node>\n")
outXMLFile.close()
#generate the HDL
try:
device = uhal.getDevice("dummy", "ipbusudp-1.3://localhost:12345",
"file://" + topXMLFile)
except Exception:
raise Exception("File '%s' does not exist or has incorrect format" %
topXMLFile)
for i in device.getNodes():
if i.count('.') == 0:
mytree = tree(device.getNode(i), log)
mytree.generatePkg()
mytree.generateRegMap(regMapTemplate=wd +
"/regmap_helper/template_map.vhd")
#cleanup
os.remove(topXMLFile)
os.chdir(wd) #go back to original path
def run(self):
cmd = [
'/opt/cactus/bin/uhal/tests/DummyHardwareUdp.exe',
'-p' + str(self.port), '-v2'
]
self._subp = subprocess.Popen(cmd, cwd='/tmp')
dummyhw = self._subp
print "Let it run for 1 sec"
time.sleep(1.)
# if self._values:
hw = uhal.getDevice('dummy_' + self.name,
'ipbusudp-2.0://localhost:' + str(self.port),
self.addr)
for k, v in self._values.iteritems():
hw.getNode(k).write(v)
hw.dispatch()
self.hw = hw
retcode = None
while (not retcode):
retcode = dummyhw.poll()
if retcode is not None:
self.code = retcode
break
if self._kill:
try:
print self.name, 'Game over!'
dummyhw.kill()
except OSError:
pass
break
else:
time.sleep(0.1)
def __init__(self, slot, links):
self.slot = 160 + slot
self.links = links
self.oh_control_link = links[links.keys()[0]]
self.glib_control_link = links.keys()[0]
ipaddr = '192.168.0.%d' % (self.slot)
#address_table = "file://${BUILD_HOME}/data/testbeam_registers.xml"
address_table = "file://${BUILD_HOME}/data/full_system_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/glib_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/optohybrid_address_table.xml"
#address_table = "file://${BUILD_HOME}/data/geb_vfat_address_table.xml"
uri = "chtcp-2.0://localhost:10203?target=%s:50001" % (ipaddr)
self.glib = uhal.getDevice("glib", uri, address_table)
#self.glib_base = self.glib.getNode("GLIB.GLIB")
#self.oh_base = self.glib.getNode("OptoHybrid.OptoHybrid")
#self.vfat_base = self.glib.getNode("OptoHybrid.OptoHybrid.GEB.VFATS")
self.printInfo(self.vfat_base)
self.printInfo(self.glib_base)
self.printInfo(self.oh_base)
self.printInfo(
"OptoHybrid.OptoHybrid.OptoHybrid_LINKS.LINK1.CLOCKING.VFAT.SOURCE"
in self.glib.getNodes())
def run(self):
cmd = ['/opt/cactus/bin/uhal/tests/DummyHardwareUdp.exe','-p'+str(self.port), '-v2']
self._subp = subprocess.Popen(cmd, cwd='/tmp')
dummyhw = self._subp
print "Let it run for 1 sec"
time.sleep(1.)
# if self._values:
hw = uhal.getDevice('dummy_'+self.name,'ipbusudp-2.0://localhost:'+str(self.port), self.addr)
for k,v in self._values.iteritems():
hw.getNode(k).write(v)
hw.dispatch()
self.hw = hw
retcode = None
while( not retcode ):
retcode = dummyhw.poll()
if retcode is not None:
self.code = retcode
break
if self._kill:
try:
print self.name,'Game over!'
dummyhw.kill()
except OSError:
pass
break
else:
time.sleep(0.1)
def hw(pytestconfig):
return uhal.getDevice("hw", pytestconfig.getoption("client"),
pytestconfig.getoption("addr"))
#!/usr/bin/python
from __future__ import print_function, absolute_import
import uhal
import time
import sys
# uhal.setLogLevelTo(uhal.LogLevel.ERROR)
hw = uhal.getDevice("sim", "ipbusudp-2.0://127.0.0.1:50001",
"file://ipbus_example.xml")
v = hw.getNode("reg").read()
hw.dispatch()
print(hex(v))
hw.getNode("reg").write(16)
hw.dispatch()
v = hw.getNode("reg").read()
hw.dispatch()
print(hex(v))
spi.getClient().dispatch()
if r & 0x100 != 0:
print "SPI write error", hex(addr), hex(data)
def spi_read(spi, addr):
spi.getNode("d0").write(0x8000 + (addr << 8)) # Read from addr
spi.getNode("ctrl").write(0x2510) # Do it
spi.getClient().dispatch()
d = spi.getNode("d0").read()
r = spi.getNode("ctrl").read()
spi.getClient().dispatch()
if r & 0x100 != 0:
print "SPI read error", hex(addr)
return d & 0xffff
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
hw = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.50:50001", "file://addrtab/top.xml")
spi = hw.getNode("io.spi")
spi_config(spi, 0xf, 0x2410, 0x1) # Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for i in range(0xf):
print "Set bank to:", hex(i)
hw.getNode("csr.ctrl.io_sel").write(i) # Select ADC bank to talk to
hw.dispatch()
spi_write(spi, 0x0, 0x80) # Reset ADC
spi_write(spi, 0x2, 0x05) # 14b 1 lane mode
spi_write(spi, 0x3, 0xbf) # ALl zeroes test pattern
spi_write(spi, 0x4, 0xff) # All zeroes test pattern
print hex(spi_read(spi, 0x2)), hex(spi_read(spi, 0x3)), hex(spi_read(spi, 0x4))
from I2CuHal import I2CCore
from si5344 import si5344
sys.path.append('/home/dsaunder/workspace/go_projects/src/bitbucket.org/solidexperiment/readout-software/scripts')
import detector_config_tools
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
ips = detector_config_tools.currentIPs(False)
slaveReadoutBoards = True
#ips = [92, 50, 88, 100, 86, 69, 53, 75, 60, 82] # Module Edgar.
ips = [92]
hw_list = []
for ip in ips:
print 'Setting up readout board ip:', ip
hw_list.append(uhal.getDevice("board", "ipbusudp-2.0://192.168.235." + str(ip) + ":50001", "file://addrtab/top.xml"))
ihw = -1
for hw in hw_list:
ihw += 1
print 'IP:', ips[ihw]
hw.getNode("csr.ctrl.soft_rst").write(1) # Reset ipbus registers
hw.dispatch()
hw.getNode("csr.ctrl.io_sel").write(9) # Talk via CPLD to Si5345
clock_I2C = I2CCore(hw, 10, 5, "io.i2c", None)
zeClock=si5344(clock_I2C)
res= zeClock.getDeviceVersion()
if slaveReadoutBoards: regCfgList=zeClock.parse_clk("Si5345-RevD-SOL64CZW-SOL64CHW-Registers.txt")
else: regCfgList=zeClock.parse_clk("Si5345-internal.txt")
zeClock.writeConfiguration(regCfgList)
#!/usr/bin/python
import uhal
from time import sleep
import sys
import collections
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
#board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.1:50001", "file://addrtab/top.xml")
board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.16:50001",
"file://addrtab_sim/top_sim.xml")
board.getClient().setTimeoutPeriod(10000)
v = board.getNode("csr.id").read()
board.dispatch()
print hex(v)
board.getNode("timing.csr.ctrl.rst").write(1) # Hold clk40 domain in reset
board.dispatch()
board.getNode("csr.ctrl.soft_rst").write(1) # Reset ipbus registers
board.dispatch()
sleep(1)
#board.getNode("csr.ctrl.chan").write(0x0) # Talk to channel 0
#board.getNode("chan.csr.ctrl.mode").write(0x0) # Set to normal DAQ mode
#board.getNode("chan.csr.ctrl.src").write(0x3) # Set source to random number generator
#board.getNode("chan.csr.ctrl.zs_thresh").write(0x2fff) # Set ZS threshold
#board.getNode("chan.csr.ctrl.en_buf").write(0x1) # Enable this channel
#board.getNode("csr.ctrl.chan").write(0x1) # Talk to channel 1
#!/usr/bin/env python
import uhal
hw = uhal.getDevice('testctp7','ipbustcp-2.0://raven1:60002','file://addresses.xml');
hw.getNode('REG').write(77)
reg = hw.getNode('REG').read()
hw.dispatch()
print 'REG',reg.value(),'expect:77'
print
hw.getNode('MEM').writeBlock([1,2,3,4])
reg = hw.getNode('MEM').readBlock(4)
hw.dispatch()
print 'MEM',list(reg),'expect:[1,2,3,4]'
print
hw.getNode('FIFO').writeBlock([1,2,3,4])
reg = hw.getNode('FIFO').readBlock(4)
hw.dispatch()
print 'FIFO',list(reg),'expect:[4,4,4,4]'
print
hw.getNode('REG').write(0x01234567)
reg1 = hw.getNode('REG').read()
reg1m = hw.getNode('REGMASK').read()
hw.getNode('REGMASK').write(0x090b0d0f)
reg2 = hw.getNode('REG').read()
reg2m = hw.getNode('REGMASK').read()
hw.getNode('REG').write(0x87654321)
reg3 = hw.getNode('REG').read()
#!/bin/env python
#import tca.gui.tcagui as tcagui
#from uhal.gui.guiloader import loader
#g = loader(False,[tcagui])
#g.start()
import wx
import gui.MP7Gui
import mp7
import uhal
import mp7tools.tester
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
board = uhal.getDevice("MP7", "ipbusudp-2.0://192.168.0.128:50001",
"file://../tests/etc/uhal/mp7_tmt/top.xml")
mp7test = mp7tools.tester.MP7Tester(board)
app = wx.App(redirect=False) # Error messages go to popup window
top = gui.MP7Gui.Frame(mp7test, "MP7")
top.Show()
app.MainLoop()
#!/usr/bin/python
import uhal
from time import sleep
import sys
#uhal.setLogLevelTo(uhal.LogLevel.INFO)
board = uhal.getDevice("glib", "ipbusudp-2.0://192.168.235.0:50001",
"file://ipbus_example.xml")
#board.getClient().setTimeoutPeriod(10000)
v = board.getNode("ctrl_reg.id").read()
board.dispatch()
print hex(v)
print "Soft reset"
board.getNode("ctrl_reg.rst").write(0x1)
board.dispatch()
print "Write enable bit and prescale"
board.getNode("i2c.ps_lo").write(0x3f)
board.getNode("i2c.ps_hi").write(0x00)
board.getNode("i2c.ctrl").write(0x80)
board.getNode("i2c.cmd_stat").write(0x00)
board.dispatch()
print "Write address"
board.getNode("i2c.data").write(0xd1)
board.getNode("i2c.cmd_stat").write(0x90)
v = board.getNode("i2c.cmd_stat").read()
board.dispatch()
return regValues
if __name__=="__main__":
parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter, description=__doc__)
parser.add_argument('device_id', help='Board URI or ID within connections file')
parser.add_argument('reg_name', help='Register node name')
group = parser.add_mutually_exclusive_group(required=True)
group.add_argument('-c','--conn_file', default=None, help='Connections file URI (e.g. file://path/to/file.xml)')
group.add_argument('-a','--addr_file', default=None, help='Address file URI (e.g. file://path/to/file.xml)')
parser.add_argument('-r','--regex', default='.*', help='Regex pattern')
args = parser.parse_args()
# Create HwInterface and print node values
uhal.setLogLevelTo( uhal.LogLevel.ERROR )
if args.conn_file is None:
device = uhal.getDevice("device", args.device_id, args.addr_file)
else:
cm = uhal.ConnectionManager(args.conn_file)
device = cm.getDevice(args.device_id)
print('Values of registers below node "'+args.reg_name+'" in device "'+args.device_id+'"')
for name, value in snapshot(device.getNode(args.reg_name), args.regex):
print(" +", name, ":", hex(value))
def __init__(self,
slot,
gtx,
tests="",
test_params=TEST_PARAMS(),
debug=False):
"""
"""
self.slot = slot
self.gtx = gtx
self.tests = tests.upper().split(',')
if ("J" in self.tests):
self.tests.append("B")
pass
if ("I" in self.tests):
self.tests.append("E")
pass
if ("H" in self.tests):
self.tests.append("G")
pass
if ("G" in self.tests):
self.tests.append("E")
pass
if ("F" in self.tests):
self.tests.append("E")
pass
if ("E" in self.tests):
self.tests.append("B")
pass
if ("D" in self.tests):
self.tests.append("B")
pass
if ("C" in self.tests):
self.tests.append("A")
pass
if ("B" in self.tests):
self.tests.append("A")
pass
self.tests = list(set(self.tests))
self.test_params = test_params
self.debug = debug
self.uTCAslot = 170
if self.slot:
uTCAslot = 160 + self.slot
pass
if self.debug:
print self.slot, uTCAslot
pass
self.ipaddr = '192.168.0.%d' % (uTCAslot)
self.address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
self.uri = "chtcp-2.0://localhost:10203?target=%s:50001" % (
self.ipaddr)
self.glib = uhal.getDevice("glib", self.uri, self.address_table)
self.oh_basenode = "GLIB.OptoHybrid_%d.OptoHybrid" % (self.gtx)
self.presentVFAT2sSingle = []
self.presentVFAT2sFifo = []
self.chipIDs = None
self.vfatmask = 0xff000000
self.test = {}
self.test["A"] = False
self.test["B"] = False
self.test["C"] = False
self.test["D"] = False
self.test["E"] = False
self.test["F"] = False
self.test["G"] = False
self.test["H"] = False
self.test["I"] = False
self.test["J"] = False
return
links = {}
for link in options.activeLinks:
pair = map(int, link.split(","))
links[pair[0]] = pair[1]
print "links", links
uhal.setLogLevelTo(uhal.LogLevel.FATAL)
uTCAslot = 175
if options.slot:
uTCAslot = 160 + options.slot
print options.slot, uTCAslot
ipaddr = '192.168.0.%d' % (uTCAslot)
address_table = "file://${BUILD_HOME}/data/glib_address_table.xml"
uri = "chtcp-2.0://localhost:10203?target=%s:50001" % (ipaddr)
glib = uhal.getDevice("glib", uri, address_table)
########################################
# IP address
########################################
print
print "--=======================================--"
print " Opening GLIB with IP", ipaddr
print "--=======================================--"
print
if not options.userOnly:
getSystemInfo(glib)
print
print "--=======================================--"
#!/usr/bin/python
import uhal
from time import sleep
import sys
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
board = uhal.getDevice("board", "ipbusudp-2.0://192.168.200.31:50001",
"file://top.xml")
#board.getClient().setTimeoutPeriod(10000)
board.getNode("csr.ctrl.sync_en").write(0)
for i in range(8):
board.getNode("csr.ctrl.mmcm_rst_1").write(1)
board.getNode("csr.ctrl.mmcm_rst_1").write(0)
board.dispatch()
sleep(0.1)
v = board.getNode("csr.stat").read()
board.dispatch()
print hex(v)
board.getNode("csr.ctrl.sync_en").write(1)
for i in range(8):
board.getNode("csr.ctrl.mmcm_rst_1").write(1)
board.getNode("csr.ctrl.mmcm_rst_1").write(0)
if __name__ == '__main__':
# PART 1: Argument parsing
if len(sys.argv) != 4:
print "Incorrect usage!"
print "usage: read_write_single_register_without_connection_file.py <uri> <address_file> <register_name>"
sys.exit(1)
uri = sys.argv[1];
addressFilePath = sys.argv[2];
registerName = sys.argv[3];
# PART 2: Creating the HwInterface
hw = uhal.getDevice("my_device", uri, "file://" + addressFilePath)
node = hw.getNode(registerName)
# PART 3: Reading from the register
print "Reading from register '" + registerName + "' ..."
reg = node.read();
# dispatch method sends read request to hardware, and waits for result to return
# N.B. Before dispatch, reg.valid() == false, and reg.value() will throw
hw.dispatch();
print "... success!"
print "Value =", hex(reg)
# PART 4: Writing (random value) to the register
links = {}
for link in options.activeLinks:
pair = map(int, link.split(","))
links[pair[0]] = pair[1]
print "links", links
uhal.setLogLevelTo(uhal.LogLevel.FATAL)
uTCAslot = 15
if options.slot:
uTCAslot = 160 + options.slot
print options.slot, uTCAslot
ipaddr = '192.168.0.%d' % (uTCAslot)
address_table = "file://${BUILD_HOME}/data/optohybrid_address_table.xml"
uri = "chtcp-2.0://localhost:10203?target=%s:50001" % (ipaddr)
optohybrid = uhal.getDevice("optohybrid", uri, address_table)
address_table = "file://${BUILD_HOME}/data/glib_address_table.xml"
glib = uhal.getDevice("glib", uri, address_table)
########################################
# IP address
########################################
print
print "-> -----------------"
print "-> OPTOHYBRID STATUS "
print "-> -----------------"
print
for link in (links.keys()):
print "-> OptoHybrid link%d firmware: 0x%08x" % (
default=250,
help="VCal value to set",
metavar="vcal")
(options, args) = parser.parse_args()
uhal.setLogLevelTo(uhal.LogLevel.FATAL)
uTCAslot = 10
if options.slot:
uTCAslot = 160 + options.slot
print options.slot, uTCAslot
ipaddr = '192.168.0.%d' % (uTCAslot)
uri = "chtcp-2.0://localhost:10203?target=%s:50001" % (ipaddr)
address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
amc = uhal.getDevice("amc", uri, address_table)
print
print "--==============Low Word 0x%08x =========================--" % (
options.lowword)
for chan in range(32):
shift = chan
if (((options.lowword) >> shift) & 0x1):
print "Setting channel %d to receivce calPulse" % (chan + 1)
writeAllVFATs(amc, options.gtx, "VFATChannels.ChanReg%d" % (chan + 1),
0x40, 0x0, options.debug)
if options.debug:
readAllVFATs(amc, options.gtx,
"VFATChannels.ChanReg%d" % (chan + 1), 0x0,
options.debug)
pass
def hw(pytestconfig):
hwInterface = uhal.getDevice("hw", pytestconfig.getoption("client"),
pytestconfig.getoption("addr"))
hwInterface.setTimeoutPeriod(10000)
return hwInterface
def setup():
uhal.disableLogging()
hw = uhal.getDevice("my_device", IPB_PATH, "file://" + ADR_TABLE)
return hw
chips = [int(n) for n in options.enabledChips.split(",")]
print "chips", chips
uhal.setLogLevelTo( uhal.LogLevel.FATAL )
uTCAslot = 10
if options.slot:
uTCAslot = 160+options.slot
print options.slot, uTCAslot
ipaddr = '192.168.0.%d'%(uTCAslot)
if options.testbeam:
ipaddr = '137.138.115.185'
uri = "chtcp-2.0://localhost:10203?target=%s:50001"%(ipaddr)
address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
optohybrid = uhal.getDevice( "optohybrid" , uri, address_table )
address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
glib = uhal.getDevice( "glib" , uri, address_table )
########################################
# IP address
########################################
if options.debug:
print
print "--=======================================--"
print " Opening GLIB with IP", ipaddr
print "--=======================================--"
getSystemInfo(glib)
print "The nodes within GLIB are:"
for inode in glib.getNode("GLIB").getNodes():
spi.getClient().dispatch()
d = spi.getNode("d0").read()
r = spi.getNode("ctrl").read()
spi.getClient().dispatch()
if r & 0x100 != 0:
print "SPI read error", hex(addr)
return d & 0xffff
invert = [0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25]
uhal.setLogLevelTo(uhal.LogLevel.ERROR)
#manager = uhal.ConnectionManager("file://connections.xml")
#board = manager.getDevice(sys.argv[1])
board = uhal.getDevice(
"board", "ipbusudp-2.0://192.168.235." + str(sys.argv[1]) + ":50001",
"file://addrtab/top.xml")
board.getClient().setTimeoutPeriod(10000)
v = board.getNode("csr.id").read()
board.dispatch()
board.getNode("daq.timing.csr.ctrl.rst").write(1) # Hold clk40 domain in reset
board.dispatch()
board.getNode("csr.ctrl.soft_rst").write(1) # Reset ipbus registers
board.dispatch()
time.sleep(1)
chans = range(0x40)
uhal.setLogLevelTo( uhal.LogLevel.FATAL )
uTCAslot = 170
if options.slot:
uTCAslot = 160+options.slot
if options.debug:
print options.slot, uTCAslot
ipaddr = '192.168.0.%d'%(uTCAslot)
if options.testbeam:
ipaddr = '137.138.115.185'
address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
uri = "chtcp-2.0://localhost:10203?target=%s:50001"%(ipaddr)
glib = uhal.getDevice( "glib" , uri, address_table )
########################################
# IP address
########################################
print
print "--=======================================--"
print " Opening GLIB with IP", ipaddr
print "--=======================================--"
print
if not options.userOnly:
getSystemInfo(glib)
print
print "--=======================================--"
print "-> DAQ INFORMATION"
def get_hw(self):
uhal.setLogLevelTo(uhal.LogLevel.DEBUG)
self.hw = uhal.getDevice("HappyDaq.udp.0", self.device_uri,
self.address_table_uri)
return self.hw
ipAddress = "192.168.235.199"
configFile = "./Si5344-RevD-SCLKSL03-Registers.txt"
for opt, arg in opts:
if opt == '-h':
print 'Some help'
sys.exit()
elif opt in ("-i", "--ip"):
ipAddress = arg
elif opt in ("-c", "--config"):
configFile = arg
print 'Config file is ', configFile
print 'IP address is ', ipAddress
hw = uhal.getDevice("board", "ipbusudp-2.0://"+ ipAddress +":50001", "file://addrtab/top.xml")
reg = hw.getNode("csr.id").read()
hw.dispatch()
print "Firmware version = ", hex(reg)
# #First I2C core
print ("Instantiating master I2C core:")
master_I2C= I2CCore(hw, 10, 5, "i2c", None)
master_I2C.state()
#CLOCK CONFIGURATION BEGIN
zeClock=si5345(master_I2C, 0x68)
res= zeClock.getDeviceVersion()
#!/usr/bin/env python
import uhal
#hw = uhal.getDevice('testctp7','ipbustcp-2.0://eagle45:60002','file://addresses.xml');
#hw = uhal.getDevice('testctp7','chtcp-2.0://localhost:10203?target=192.168.250.53:60002','file://addresses.xml');
#hw.getNode('BOARD_ID').write(77)
hw = uhal.getDevice('testctp7', 'ipbustcp-2.0://eagle45:60002',
'file://addresses.xml')
reg = hw.getNode('BOARD_ID').read()
hw.dispatch()
print 'BOARD_ID', reg.value(), 'expect:BEEF!!!!!'
print
#hw.getNode('MEM').writeBlock([1,2,3,4])
#reg = hw.getNode('MEM').readBlock(4)
#hw.dispatch()
#print 'MEM',list(reg),'expect:[1,2,3,4]'
#print
#
#hw.getNode('FIFO').writeBlock([1,2,3,4])
#reg = hw.getNode('FIFO').readBlock(4)
#hw.dispatch()
#print 'FIFO',list(reg),'expect:[4,4,4,4]'
#print
#
#hw.getNode('REG').write(0x01234567)
#reg1 = hw.getNode('REG').read()
#reg1m = hw.getNode('REGMASK').read()
#hw.getNode('REGMASK').write(0x090b0d0f)
#reg2 = hw.getNode('REG').read()
if not ok:
print ' First mismatch at:', next(
(idx, x, y) for idx, (x, y) in enumerate(zip(in_words, val_vec))
if x != y)
# ----------------------------------------------------------
reladdrpath = [
os.pardir, os.pardir, 'components', 'ipbus_util', 'addr_table',
'ram_slaves_tester.xml'
]
addrtabpath = 'file://' + os.path.normpath(
os.path.join(os.path.abspath(os.path.dirname(__file__)), *reladdrpath))
device = uhal.getDevice('SIM', 'ipbusudp-2.0://192.168.201.2:50001',
addrtabpath)
# Reset
# device.getNode('csr.ctrl.rst').write(0x1)
# device.dispatch()
# Read magic word
csr_stat = device.getNode('csr.stat').read()
device.dispatch()
print 'stat =', hex(csr_stat)
# ----- rw reg
reg_node = device.getNode('reg')
val = reg_node.read()
device.dispatch()
def main(localSlavesYAML, remoteSlavesYAML, CMyaml, outputDir):
#address table top node
top = ET.Element("node", {"id": "top"})
#local slaves
RecreateDir(outputDir + "address_table/modules")
slavesFile = open(localSlavesYAML)
slaves = yaml.load(slavesFile)
for slave in slaves['UHAL_MODULES']:
if "XML" in slaves['UHAL_MODULES'][slave]:
for iFile in range(0, len(slaves['UHAL_MODULES'][slave]["XML"])):
#copy XML files
xmlFile = slaves['UHAL_MODULES'][slave]["XML"][iFile]
try:
shutil.copyfile(os.path.abspath(xmlFile),
outputDir + xmlFile)
except OSError:
pass
if iFile == 0:
relPath = slaves['UHAL_MODULES'][slave]['XML'][iFile]
relPath = relPath[relPath.find("module"):]
slaves['UHAL_MODULES'][slave]['XML'][iFile] = relPath
AddAddressTableNode(slave, slaves['UHAL_MODULES'][slave], top)
remoteSlaves = list()
#append CM.yaml remote slaves
try:
if type(CMyaml) == type(' '):
CMFile = open(CMyaml)
remotes = yaml.load(CMFile)
if remotes:
for remote in remotes:
filename = "os/" + remote + "_slaves.yaml"
remoteSlaves.append(filename)
except IOError:
pass
#remote slaves (explicit)
if type(remoteSlavesYAML) == type(list()):
for CM in remoteSlavesYAML:
remoteSlaves.append(CM)
#go through all found remote slaves
for CM in remoteSlaves:
slavesFile = open(CM)
slaves = yaml.load(slavesFile)
nameCM = os.path.basename(CM)[0:os.path.basename(CM).find("_")]
for slave in slaves['UHAL_MODULES']:
if "XML" in slaves['UHAL_MODULES'][slave]:
for iFile in range(0,
len(slaves['UHAL_MODULES'][slave]["XML"])):
#change the file path to be relative on the apollo
relPath = slaves['UHAL_MODULES'][slave]['XML'][iFile]
relPath = nameCM + "_" + relPath[relPath.find("module"):]
slaves['UHAL_MODULES'][slave]['XML'][iFile] = relPath
AddAddressTableNode(slave, slaves['UHAL_MODULES'][slave], top)
#generate the final address table file
BuildAddressTable(outputDir + "address_table/address_apollo.xml", top)
#generate a connections file
connFile = open(outputDir + "address_table/connections.xml", "w")
connFile.write('<?xml version="1.0" encoding="UTF-8"?>\n')
connFile.write('\n')
connFile.write('<connections>\n')
connFile.write(
' <!-- be sure to use the same file in both "uri" and "address_table" -->\n'
)
connFile.write(
' <connection id="test.0" uri="uioaxi-1.0:///opt/address_table/address_apollo.xml" address_table="file:///opt/address_table/address_apollo.xml" />\n'
)
connFile.write('</connections>\n')
connFile.close()
#check files
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
try:
device = uhal.getDevice(
"dummy", "ipbusudp-1.3://localhost:12345",
"file://" + outputDir + "address_table/address_apollo.xml")
except Exception:
raise Exception("File '%s' does not exist or has incorrect format" %
outputDir + "address_table/address_apollo.xml")
######################################################################
if __name__ == '__main__':
if len(sys.argv) < 3:
print "Please specify the device IP address" \
" and the top-level address table file to use"
sys.exit(1)
device_ip = sys.argv[1]
device_uri = "ipbusudp-2.0://" + device_ip + ":50001"
address_table_name = sys.argv[2]
address_table_uri = "file://" + address_table_name
uhal.setLogLevelTo(uhal.LogLevel.WARNING)
hw = uhal.getDevice("dummy", device_uri, address_table_uri)
reg_name_base = "sysmon."
regs = ["temp", "vccint", "vccaux", "vrefp", "vrefn", "vccbram"]
max_len = max([len(i) for i in regs])
print "IPBus SysMon/XADC demo:"
for reg_name_spec in regs:
reg_name = reg_name_base + reg_name_spec
node = hw.getNode(reg_name)
val_raw = node.read()
hw.dispatch()
# NOTE: Yes, flexible but ugly.
val = val_raw.value()
tags = hw.getNode(reg_name).getTags()
import uhal
from registers_uhal import *
#from glib_clock_src import *
#from optparse import OptionParser
#parser = OptionParser()
#(options, args) = parser.parse_args()
uhal.setLogLevelTo( uhal.LogLevel.FATAL )
ipaddr = '192.168.250.53'
address_table = "file://${GEM_ADDRESS_TABLE_PATH}/glib_address_table.xml"
uri = "ipbustcp-2.0://eagle45:60002"
ctp7 = uhal.getDevice( "CTP7" , uri, address_table )
########################################
# IP address
########################################
print
print "--=======================================--"
print " Opening CTP7 with IP", ipaddr
print "--=======================================--"
print
print
print "--=======================================--"
print "-> DAQ INFORMATION"
print "--=======================================--"
print
