def clock(self, source): clocksel = bf(self.read(self.map['CLKSEL'])) pllctrl = bf(self.read(self.map['PLLCTRL'])) if source == self.internalClock: # Enable LAB clock. clocksel[1] = 1 # Use FPGA input. clocksel[0] = 0 # Enable local clock. clocksel[2] = 0 if pllctrl[1]: # Switch PLL to internal clock. Need to reset it. pllctrl[1] = 0 pllctrl[0] = 1 self.write(self.map['PLLCTRL'], int(pllctrl)) pllctrl[0] = 0 self.write(self.map['PLLCTRL'], int(pllctrl)) self.write(self.map['CLKSEL'], int(clocksel)) elif source == self.externalClock: # Enable LAB clock. clocksel[1] = 1 # Use TURF input. clocksel[0] = 1 # Disable local clock clocksel[2] = 1 if not pllctrl[1]: # Switch PLL to external clock. Need to reset it. pllctrl[1] = 1 pllctrl[0] = 1 self.write(self.map['PLLCTRL'], int(pllctrl)) pllctrl[0] = 0 self.write(self.map['PLLCTRL'], int(pllctrl)) self.write(self.map['CLKSEL'], int(clocksel))
def program(self, path): oldctrl = bf(self.dev.read(self.addr)) # 'addr' points to the BRAM control register ctrl = bf(0) # set processor_reset ctrl[31] = 1 self.dev.write(self.addr, int(ctrl)) # enable BRAM WE ctrl[30] = 1 bramaddr = 0 with open(path, "rb") as f: for line in f: instr = int(line, 16) if bramaddr == 0: print "PicoBlaze address 0 (reset) instruction: %8.8x" % instr ctrl[17:0] = instr ctrl[27:18] = bramaddr self.dev.write(self.addr, int(ctrl)) bramaddr = bramaddr + 1 if bramaddr > 1023: break print oldctrl[31] if oldctrl[31] == 1: print "Leaving PicoBlaze in reset." else: print "Pulling PicoBlaze out of reset." ctrl = 0 self.dev.write(self.addr, int(ctrl)) print "PicoBlaze address 0 (reset) readback: %8.8x" % ( self.dev.read(self.addr) & 0xFFFFFFFF)
def identify(self): ident = bf(self.read(self.map['IDENT'])) ver = bf(self.read(self.map['VERSION'])) print "Identification Register: %x (%c%c%c%c)" % ( int(ident), ident[31:24], ident[23:16], ident[15:8], ident[7:0]) print "Version Register: %d.%d.%d compiled %d/%d" % ( ver[15:12], ver[11:8], ver[7:0], ver[28:24], ver[23:16]) print "Device DNA: %x" % self.dna()
def read(self, addr=None): val = bf(self.dev.read(self.addr)) oldval = val if addr is not None: val[27:18] = addr val[30] = 0 self.dev.write(self.addr, int(val)) val = bf(self.dev.read(self.addr)) self.dev.write(self.addr, int(oldval)) return "%3.3x: %s [%s]" % (val[27:18], self.decode( val[17:0]), "RESET" if val[31] else "RUNNING")
def reset_fifo(self, force=False, reset_readout=True): ctrl = bf(self.read(self.map['CONTROL'])) if ctrl[1] and not force: print 'cannot reset FIFO: LAB4 in run mode' return 1 else: if reset_readout: self.run_mode(0) rdout = bf(self.read(self.map['READOUT'])) rdout[1] = 1 rdout[2] = reset_readout self.write(self.map['READOUT'], rdout) return 0
def testpattern_mode(self, enable=True): #when enabled, SELany bit is 0 rdout = bf(self.read(self.map['READOUT'])) if enable: rdout[4] = 0 self.write(self.map['READOUT'], rdout) else: rdout[4] = 1 self.write(self.map['READOUT'], rdout)
def run_mode(self, enable=True): ctrl = bf(self.read(self.map['CONTROL'])) if enable: ctrl[1] = 1 self.write(self.map['CONTROL'], ctrl) else: ctrl[1] = 0 self.write(self.map['CONTROL'], ctrl)
def status(self): clocksel = bf(self.read(self.map['CLKSEL'])) pllctrl = bf(self.read(self.map['PLLCTRL'])) int_status = bf(self.read(self.map['INTCSR'])) int_mask = bf(self.read(self.map['INTMASK'])) led = bf(self.read(self.map['LED'])) labcontrol = bf(self.labc.read(self.labc.map['CONTROL'])) labreadout = bf(self.labc.read(self.labc.map['READOUT'])) print "Clock Status: LAB4 Clock is %s (CLKSEL[1] = %d)" % ( "enabled" if clocksel[1] else "not enabled", clocksel[1]) print " : LAB4 Driving Clock is %s (CLKSEL[0] = %d)" % ( "TURF Clock" if clocksel[0] else "FPGA Clock", clocksel[0]) print " : Local Clock is %s (CLKSEL[2] = %d)" % ( "enabled" if not clocksel[2] else "not enabled", clocksel[2]) print " : FPGA System Clock PLL is %s (PLLCTRL[0] = %d/PLLCTRL[2] = %d)" % ( "powered down" if pllctrl[2] else ("running" if not pllctrl[0] else "in reset"), pllctrl[0], pllctrl[2]) print " : FPGA System Clock is %s (PLLCTRL[1] = %d)" % ( "TURF Clock" if pllctrl[1] else "Local Clock", pllctrl[1]) print " Int Status : %8.8x" % (self.read(self.map['INTCSR']) & 0xFFFFFFFF) print " LED : Internal value %3.3x, Key value %3.3x" % ( led[11:0], led[27:16]) print " Full LED : %8.8x" % (self.read(self.map['LED']) & 0xFFFFFFFF) print " Int Mask : %8.8x" % (self.read(self.map['INTMASK']) & 0xFFFFFFFF) print "**********************" self.i2c.read_dac() print "**********************" print "LAB4 runmode: %s" % ("enabled" if labcontrol[1] else "not enabled") print "LAB4 testpat: %s" % ("enabled" if not labreadout[4] else "not enabled")
def reg_clr(self): ctrl = bf(self.read(self.map['CONTROL'])) if ctrl[1]: print 'cannot issue REG_CLR: LAB4 in run mode' return 1 else: self.write(0, 0xFFF0000) self.write(0, 0) return 0
def l4reg(self, lab, addr, value, verbose=False): ctrl = bf(self.read(self.map['CONTROL'])) if ctrl[1]: #should be checking ctrl[2], which indicates run-mode. but not working 6/9 print 'LAB4_Controller is running, cannot update registers.' return user = bf(self.read(self.map['L4REG'])) if user[31]: print 'LAB4_Controller is still processing a register?' return user[11:0] = value user[23:12] = addr user[27:24] = lab user[31] = 1 if verbose: print 'Going to write 0x%X' % user self.write(self.map['L4REG'], int(user)) while not user[31]: user = bf(self.read(self.map['L4REG']))
def set_vped(self, value, eeprom=False): val = bf(value) if eeprom: dac_bytes = [0x5E, (0x8 << 4) | (val[11:8]), val[7:0]] else: dac_bytes = [0x46, (0x8 << 4) | (val[11:8]), val[7:0]] self.dac.write_seq(dac_bytes) if eeprom: self.wait() self.wait(0.1)
def set_rfp_vped(self, value=[0x9C4, 0x7A0, 0x578], eeprom=False): val0 = bf(value[0]) val1 = bf(value[1]) val2 = bf(value[2]) dac_bytes = [] if eeprom: dac_bytes.append([0x58, (0x8 << 4) | (val0[11:8]), val0[7:0]]) dac_bytes.append([0x5A, (0x8 << 4) | (val1[11:8]), val1[7:0]]) dac_bytes.append([0x5C, (0x8 << 4) | (val2[11:8]), val2[7:0]]) else: dac_bytes.append([0x40, (0x8 << 4) | (val0[11:8]), val0[7:0]]) dac_bytes.append([0x42, (0x8 << 4) | (val1[11:8]), val1[7:0]]) dac_bytes.append([0x44, (0x8 << 4) | (val2[11:8]), val2[7:0]]) for i in range(0, len(dac_bytes)): self.dac.write_seq(dac_bytes[i]) if eeprom: self.wait( ) #time delay required to write to eeprom! (can be better handled, surely) self.wait(0.1)
def check_fifo(self, check_fifos=False): rdout = bf(self.read(self.map['READOUT'])) ''' check_mode = 0, check if data available on any fifo (not empty) check_mode = 1, check individual readout fifo empties, return 12 bits ''' if check_fifos: return rdout[27:16] else: return rdout[3]
def decode(val): instr = bf(val) instr0 = PicoBlaze.instr0_map.get(instr[17:13]) if instr0 is not None: return "%s s%1.1X, %s" % (instr0, instr[11:8], format(instr[7:0], 'X') if instr[12] else ("s%1.1X" % instr[7:4])) else: # Shift/rotate/hwbuild instructions. if instr[17:12] == 0x14: instr1 = PicoBlaze.instr1_map.get(instr[7:0]) if instr1 is not None: return "%s s%1.1X" % (instr1, instr[11:8]) else: return "Illegal instruction." # Jump/call instructions. elif instr[17:16] == 0x3 and instr[12] == 0: return "%s %s%s, %3.3x" % ("JUMP" if instr[13] else "CALL", "N" if instr[14] else "", "C" if instr[15] else "Z", instr[11:0]) elif instr[17:12] == 0x22 or instr[17:12] == 0x20: return "%s %3.3x" % ("JUMP" if instr[13] else "CALL", instr[11:0]) elif instr[17:12] == 0x24 or instr[17:12] == 0x26: return "%s@ (s%1.1X,s%1.1X)" % ( "JUMP" if instr[13] else "CALL", instr[11:8], instr[7:4]) # Return. # 11 0001 # 11 0101 # 11 1001 # 11 1101 elif instr[17:16] == 0x3 and instr[12:11] == 1: return "RETURN %s%s" % ("N" if instr[14] else "", "C" if instr[15] else "Z") elif instr[17:12] == 0x25: return "RETURN" # In/out/store/fetch elif instr[17:13] == (0x08 >> 1) or instr[17:13] == ( 0x2C >> 1) or instr[17:13] == ( 0x2E >> 1) or instr[17:13] == (0x0A >> 1): return "%s s%1.1X, %s" % (PicoBlaze.instr2_map[instr[17:13]], instr[11:8], format(instr[7:0], 'X') if instr[12] else ("(s%1.1X)" % instr[7:4])) elif instr[17:12] == 0x2B: return "OUTPUTK %2.2x, %2.2x" % (instr[11:4], instr[3:0]) # Specialty elif instr[17:12] == 0x37: return "REGBANK %s" % ("B" if instr[0] else "A") elif instr[17:13] == (0x28 >> 1): return "%s%s%s" % ("RETURNI " if instr[12] else "", "ENABLE" if instr[0] else "DISABLE", "" if instr[12] else " INTERRUPT") elif instr[17:12] == 0x21: return "LOAD&RETURN s%1.1X, %2.2X" % (instr[11:8], instr[7:0])
def led_one(self, led_num, value): led_current = bf(self.read(self.map['LED'])) led_current_binary = "{0:b}".format( led_current[31:0] ) # string containing current LED configuration in binary led_current_binary = "0000" + led_current_binary print "integer value of led_current_binary: " + str( int(led_current_binary, base=2)) print led_num print value print "current LED values in binary: " + led_current_binary # this string misses the first four zeros! print len(led_current_binary) print led_current_binary[0] print led_current_binary[15], led_current_binary[16] print led_current_binary[27] print "the type of led_current_binary is: %s" % ( type(led_current_binary)) # check it's a string! print " " led_current_VALUE = led_current_binary[ 20:32] # take last part of string to get just VALUES led_VALUE_list = list( led_current_VALUE ) # turn string into list so we can easily toggle its values print "The length of the array is %d" % (len(led_VALUE_list)) led_VALUE_list[ led_num] = value # change the LED value that user wants to change led_VALUE_string = self.list_to_string( led_VALUE_list) # turn list of LED values back into string led_KEY_string = self.list_to_string( self.led_KEY_list) # turn list of LED key values to string led_full_string = self.led_unusedbits + led_KEY_string + self.led_unusedbits + led_VALUE_string # put the different strings together to get full LED configuration print "updated LED values in binary: " + led_full_string self.write( self.map['LED'], int(led_full_string, base=2) ) # write in this new configuration to see the change take place print "integer value of led_full_string: " + str( int(led_full_string, base=2)) u = bf(self.read(self.map['LED'])) y = "{0:b}".format(u[31:0]) print "after we change everyting: " + "0000" + y print led_num print value
def scan_edge(self, lab, pos=0, start=0): val = bf(0) val[15:0] = start val[24] = pos val[19:16] = lab self.write(self.map['PHASEARG'], int(val)) self.write(self.map['PHASECMD'], 0x04) ret = self.read(self.map['PHASECMD']) while ret != 0x00: ret = self.read(self.map['PHASECMD']) return self.read(self.map['PHASERES'])
def scan_value(self, lab, position): if position > 4479: print "Position must be 0-4479." return None val = bf(0) val[15:0] = position val[19:16] = lab self.write(self.map['PHASEARG'], int(val)) self.write(self.map['PHASECMD'], 0x03) res = self.read(self.map['PHASECMD']) while res != 0x00: res = self.read(self.map['PHASECMD']) return self.read(self.map['PHASERES'])
def __init__(self, dev, base, device=0): self.dev = dev self.base = base self.device = device val = bf(self.dev.read(self.base + self.map['SPCR'])) val[6] = 1 val[3] = 0 val[2] = 0 self.dev.write(self.base + self.map['SPCR'], int(val)) res = self.command(self.cmd['RES'], 3, 1) self.electronic_signature = res[0] res = self.command(self.cmd['RDID'], 0, 3) self.manufacturer_id = res[0] self.memory_type = res[1] self.memory_capacity = 2**res[2]
def config_rfp(self, continuous_mode=True, data_rate=2, input_mux=3, pga_gain=2, thresh_lo=0x8000, thresh_hi=0x7FFF): rfp_config_register = 0x1 rfp_lothresh_register = 0x2 rfp_hithresh_register = 0x3 config_hi = (input_mux & 0x7) << 4 | (pga_gain & 0x7) << 1 | ( not continuous_mode) | 0x00 config_lo = (data_rate & 0x7) << 5 | 0x00 #set threshold register values to enable continuous mode: #hi-thresh MSB = '1', lo-thresh MSB = '0' if continuous_mode: thresh_lo = thresh_lo & (0 << 16) thresh_hi = thresh_hi | 0x8000 #configure all rfp channels similarly: for i in range(0, 12): self.rfp[i].write_seq([rfp_config_register, config_hi, config_lo]) self.wait(0.01) #verify write (NOTE: top bit different for read/write in config reguster, so not compared!) ######## ( the top bit 15: indicates a `conversion in process' if [0] or not if [1] ) if self.read_rfp( rfp_config_register, i)[14:0] != bf((config_hi << 8) | config_lo)[14:0]: print 'rfp %i error: write/read mismatch to config register' % i self.rfp[i].write_seq([ rfp_lothresh_register, bf(thresh_lo)[15:8], bf(thresh_lo)[7:0] ]) self.wait(0.01) if self.read_rfp(rfp_lothresh_register, i)[15:0] != bf(thresh_lo)[15:0]: print 'rfp %i error: write/read mismatch to low-thresh register' % i self.rfp[i].write_seq([ rfp_hithresh_register, bf(thresh_hi)[15:8], bf(thresh_hi)[7:0] ]) self.wait(0.01) if self.read_rfp(rfp_hithresh_register, i)[15:0] != bf(thresh_hi)[15:0]: print 'rfp %i error: write/read mismatch to hi-thresh register' % i
def command(self, command, dummy_bytes, num_read_bytes, data_in=[]): self.dev.spi_cs(self.device, 1) self.dev.write(self.base + self.map['SPDR'], command) x = 0 for dat in data_in: self.dev.write(self.base + self.map['SPDR'], dat) val = bf(self.map['SPSR']) x += 1 if val[6] == 1: return x for i in range(dummy_bytes): self.dev.write(self.base + self.map['SPDR'], 0x00) # Empty the read FIFO. while not (self.dev.read(self.base + self.map['SPSR']) & self.bits['RFEMPTY']): self.dev.read(self.base + self.map['SPDR']) rdata = [] for i in range(num_read_bytes): self.dev.write(self.base + self.map['SPDR'], 0x00) rdata.append(self.dev.read(self.base + self.map['SPDR'])) self.dev.spi_cs(self.device, 0) return rdata
def run_rfp(self, lab, run_time=5.0, plot=False): my_rfp = [] my_rfp.append(RFPdata(lab)) self.ioexpander.read_seq( 2) #do an initial read to clear any interrupts start = time.time() while ((time.time() - start) < run_time): self.ioexpander.write_seq( [0x4D]) #address the interupt status register, port 1 interrupt = self.ioexpander.read_seq( 2) #read 2 bytes (upper and lower ports) interrupt_time = time.time() - start interrupt_status_register = bf(((interrupt[0] & 0x0F) << 8) | (interrupt[1] & 0xFF)) if interrupt_status_register[11 - lab] == 1: my_rfp[0].data.append(self.read_rfp(0x0, lab)[15:0]) my_rfp[0].time.append(interrupt_time) self.ioexpander.write_seq([0x01]) self.ioexpander.read_seq( 2) #reading input register clears the interrupt self.ioexpander.read_seq(2) #convert from 2's complement: for j in range(0, len(my_rfp[0].data)): if my_rfp[0].data[j] > 0x7FFF: my_rfp[0].data[j] = my_rfp[0].data[j] - (1 << 16) if plot: import matplotlib.pyplot as plt plt.ion() plt.plot(my_rfp[0].time, my_rfp[0].data, 'o-') return my_rfp
def table_for_robustness(robustness_measure): global datasets data = df[df['robustness'] == robustness_measure] # each count should be 1 # data.groupby(["metric", "dataset"])['value'].count() pivot = data.pivot_table(values="value", index="metric", columns="dataset", aggfunc="first") \ .rename_axis(None) pivot.columns = pivot.columns.astype(list) pivot = pivot.reset_index() # .rename({"index": }, axis=1) column_format = "|p{40mm}|" + "|".join( "c" * (len(datasets)) for experiment, datasets in experiment_datasets.items()) + "|" float_formatter = ffloat if robustness_measure != "RankInstability" else fffloat latex = pivot.to_latex( escape=False, index=False, # index_names=False, caption=robustness_measure + " of " + str(len(metrics)) + " metrics on " + str(len(datasets)) + " datasets (" + experiments_str + ")", label="tab:robustness-" + robustness_measure[4:].lower(), column_format=column_format, header=[small(bf(robustness_measure))] + [tiny(tt(col)) for col in datasets], formatters=[lambda v: small(v)] + [lambda v: small(ffloat(v))] * len(datasets), ) latex = modify_tabular(latex, in_table=False, prefix="\scalebox{1}{\n", postfix="\n}") return latex
def reset(self): oldctrl = bf(self.dev.read(self.addr)) oldctrl[31] = 1 self.dev.write(self.addr, int(oldctrl)) oldctrl[31] = 0 self.dev.write(self.addr, int(oldctrl))
def read_rfp(self, pointer_reg, lab): self.rfp[lab].write_seq([pointer_reg]) rfp_register = self.rfp[lab].read_seq(2) return bf((rfp_register[0] << 8) | rfp_register[1])
def read_fifo(self, lab, address=0): val = bf(self.read(self.map['LAB4_ROM_BASE'] + (lab << 11) + address)) sample0 = val[15:0] sample1 = val[31:16] return int(sample0), int(sample1)
def start(self): ctrl = bf(self.read(self.map['CONTROL'])) while not ctrl[2]: ctrl[1] = 1 self.write(self.map['CONTROL'], int(ctrl)) ctrl = bf(self.read(self.map['CONTROL']))
def stop(self): ctrl = bf(self.read(self.map['CONTROL'])) while ctrl[2]: ctrl[1] = 0 self.write(self.map['CONTROL'], int(ctrl)) ctrl = bf(self.read(self.map['CONTROL']))
def spi_cs(self, device, state): # We only have 1 SPI device. val = bf(self.read(self.map['SPICS'])) val[device] = state self.write(self.map['SPICS'], int(val))
def reset_ramp(self): ctrl = bf(self.read(self.map['CONTROL'])) ctrl[8] = 1 self.write(self.map['CONTROL'], ctrl)