def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
yield clk.posedge
print("test 1: downstream packets")
current_test.next = 1
pkt0 = xfcp.XFCPFrame()
pkt0.path = [0]
pkt0.ptype = 1
pkt0.payload = bytearray(range(8))
pkt1 = xfcp.XFCPFrame(pkt0)
pkt1.path = [1]
pkt2 = xfcp.XFCPFrame(pkt0)
pkt2.path = [2]
pkt3 = xfcp.XFCPFrame(pkt0)
pkt3.path = [3]
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt0)
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
up_xfcp_port.send(pkt3)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = down_xfcp_port_list[0].recv()
check_pkt = xfcp.XFCPFrame(pkt0)
check_pkt.path = check_pkt.path[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = down_xfcp_port_list[1].recv()
check_pkt = xfcp.XFCPFrame(pkt1)
check_pkt.path = check_pkt.path[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = down_xfcp_port_list[2].recv()
check_pkt = xfcp.XFCPFrame(pkt2)
check_pkt.path = check_pkt.path[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = down_xfcp_port_list[3].recv()
check_pkt = xfcp.XFCPFrame(pkt3)
check_pkt.path = check_pkt.path[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 2: upstream packets")
current_test.next = 2
pkt = xfcp.XFCPFrame()
pkt.ptype = 1
pkt.payload = bytearray(range(8))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
down_xfcp_port_list[0].send(pkt)
yield clk.posedge
down_xfcp_port_list[1].send(pkt)
down_xfcp_port_list[2].send(pkt)
down_xfcp_port_list[3].send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.path.insert(0, 0)
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = up_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.path.insert(0, 1)
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = up_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.path.insert(0, 2)
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = up_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.path.insert(0, 3)
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 3: test id")
current_test.next = 3
pkt = xfcp.XFCPFrame()
pkt.ptype = 0xFE
pkt.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 4: test id with trailing bytes")
current_test.next = 4
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0xFE
pkt1.payload = b'\x00' * 256
pkt2 = xfcp.XFCPFrame()
pkt2.ptype = 0xFE
pkt2.payload = b'\x00' * 8
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 5: test id with rpath")
current_test.next = 5
pkt = xfcp.XFCPFrame()
pkt.rpath = [1, 2, 3]
pkt.ptype = 0xFE
pkt.payload = b'\x00' * 8
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.rpath == [1, 2, 3]
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 6: test invalid packets")
current_test.next = 6
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0x99
pkt1.payload = b'\x00' * 8
pkt2 = xfcp.XFCPFrame()
pkt2.path = [10]
pkt2.ptype = 0xFE
pkt2.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
assert rx_pkt is None
rx_pkt = down_xfcp_port_list[0].recv()
assert rx_pkt is None
rx_pkt = down_xfcp_port_list[1].recv()
assert rx_pkt is None
rx_pkt = down_xfcp_port_list[2].recv()
assert rx_pkt is None
rx_pkt = down_xfcp_port_list[3].recv()
assert rx_pkt is None
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
yield clk.posedge
print("test 1: enumerate via UDP")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.path = []
pkt.rpath = []
pkt.ptype = 0xfe
pkt.payload = b''
test_frame = udp_ep.UDPFrame()
test_frame.eth_dest_mac = 0x020000000000
test_frame.eth_src_mac = 0xDAD1D2D3D4D5
test_frame.eth_type = 0x0800
test_frame.ip_version = 4
test_frame.ip_ihl = 5
test_frame.ip_dscp = 0
test_frame.ip_ecn = 0
test_frame.ip_length = None
test_frame.ip_identification = 0
test_frame.ip_flags = 2
test_frame.ip_fragment_offset = 0
test_frame.ip_ttl = 64
test_frame.ip_protocol = 0x11
test_frame.ip_header_checksum = None
test_frame.ip_source_ip = 0xc0a80181
test_frame.ip_dest_ip = 0xc0a80180
test_frame.udp_source_port = 1234
test_frame.udp_dest_port = 14000
test_frame.payload = pkt.build_axis()
test_frame.build()
mii_source.send(b'\x55\x55\x55\x55\x55\x55\x55\xD5' +
test_frame.build_eth().build_axis_fcs().data)
# wait for ARP request packet
rx_frame = None
while rx_frame is None:
yield clk.posedge
rx_frame = mii_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis_fcs(rx_frame.data[8:])
check_frame = arp_ep.ARPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
assert check_frame.eth_dest_mac == 0xFFFFFFFFFFFF
assert check_frame.eth_src_mac == 0x020000000000
assert check_frame.eth_type == 0x0806
assert check_frame.arp_htype == 0x0001
assert check_frame.arp_ptype == 0x0800
assert check_frame.arp_hlen == 6
assert check_frame.arp_plen == 4
assert check_frame.arp_oper == 1
assert check_frame.arp_sha == 0x020000000000
assert check_frame.arp_spa == 0xc0a80180
assert check_frame.arp_tha == 0x000000000000
assert check_frame.arp_tpa == 0xc0a80181
# generate response
arp_frame = arp_ep.ARPFrame()
arp_frame.eth_dest_mac = 0x020000000000
arp_frame.eth_src_mac = 0xDAD1D2D3D4D5
arp_frame.eth_type = 0x0806
arp_frame.arp_htype = 0x0001
arp_frame.arp_ptype = 0x0800
arp_frame.arp_hlen = 6
arp_frame.arp_plen = 4
arp_frame.arp_oper = 2
arp_frame.arp_sha = 0xDAD1D2D3D4D5
arp_frame.arp_spa = 0xc0a80181
arp_frame.arp_tha = 0x020000000000
arp_frame.arp_tpa = 0xc0a80180
mii_source.send(b'\x55\x55\x55\x55\x55\x55\x55\xD5' +
arp_frame.build_eth().build_axis_fcs().data)
rx_frame = None
while rx_frame is None:
yield clk.posedge
rx_frame = mii_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis_fcs(rx_frame.data[8:])
check_frame = udp_ep.UDPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
assert check_frame.eth_dest_mac == 0xDAD1D2D3D4D5
assert check_frame.eth_src_mac == 0x020000000000
assert check_frame.eth_type == 0x0800
assert check_frame.ip_version == 4
assert check_frame.ip_ihl == 5
assert check_frame.ip_dscp == 0
assert check_frame.ip_ecn == 0
assert check_frame.ip_identification == 0
assert check_frame.ip_flags == 2
assert check_frame.ip_fragment_offset == 0
assert check_frame.ip_ttl == 64
assert check_frame.ip_protocol == 0x11
assert check_frame.ip_source_ip == 0xc0a80180
assert check_frame.ip_dest_ip == 0xc0a80181
assert check_frame.udp_source_port == 14000
assert check_frame.udp_dest_port == 1234
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis(check_frame.payload.data)
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert rx_pkt.path == []
assert rx_pkt.rpath == []
assert len(rx_pkt.payload.data) == 64
pkt = xfcp.XFCPFrame()
pkt.path = [0]
pkt.rpath = []
pkt.ptype = 0xfe
pkt.payload = b''
test_frame = udp_ep.UDPFrame()
test_frame.eth_dest_mac = 0x020000000000
test_frame.eth_src_mac = 0xDAD1D2D3D4D5
test_frame.eth_type = 0x0800
test_frame.ip_version = 4
test_frame.ip_ihl = 5
test_frame.ip_dscp = 0
test_frame.ip_ecn = 0
test_frame.ip_length = None
test_frame.ip_identification = 0
test_frame.ip_flags = 2
test_frame.ip_fragment_offset = 0
test_frame.ip_ttl = 64
test_frame.ip_protocol = 0x11
test_frame.ip_header_checksum = None
test_frame.ip_source_ip = 0xc0a80181
test_frame.ip_dest_ip = 0xc0a80180
test_frame.udp_source_port = 1234
test_frame.udp_dest_port = 14000
test_frame.payload = pkt.build_axis()
test_frame.build()
mii_source.send(b'\x55\x55\x55\x55\x55\x55\x55\xD5' +
test_frame.build_eth().build_axis_fcs().data)
rx_frame = None
while rx_frame is None:
yield clk.posedge
rx_frame = mii_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis_fcs(rx_frame.data[8:])
check_frame = udp_ep.UDPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
assert check_frame.eth_dest_mac == 0xDAD1D2D3D4D5
assert check_frame.eth_src_mac == 0x020000000000
assert check_frame.eth_type == 0x0800
assert check_frame.ip_version == 4
assert check_frame.ip_ihl == 5
assert check_frame.ip_dscp == 0
assert check_frame.ip_ecn == 0
assert check_frame.ip_identification == 0
assert check_frame.ip_flags == 2
assert check_frame.ip_fragment_offset == 0
assert check_frame.ip_ttl == 64
assert check_frame.ip_protocol == 0x11
assert check_frame.ip_source_ip == 0xc0a80180
assert check_frame.ip_dest_ip == 0xc0a80181
assert check_frame.udp_source_port == 14000
assert check_frame.udp_dest_port == 1234
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis(check_frame.payload.data)
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert rx_pkt.path == [0]
assert rx_pkt.rpath == []
assert len(rx_pkt.payload.data) == 32
assert mii_source.empty()
assert mii_sink.empty()
yield delay(100)
yield clk.posedge
print("test 1: test write and read RAM 0")
current_test.next = 1
pkt1 = xfcp.XFCPFrame()
pkt1.path = [0]
pkt1.ptype = 0x12
pkt1.payload = bytearray(
struct.pack('<BH', 0, 4) + b'\x11\x22\x33\x44')
pkt2 = xfcp.XFCPFrame()
pkt2.path = [0]
pkt2.ptype = 0x10
pkt2.payload = bytearray(struct.pack('<BH', 0, 4))
test_frame1 = udp_ep.UDPFrame()
test_frame1.eth_dest_mac = 0x020000000000
test_frame1.eth_src_mac = 0xDAD1D2D3D4D5
test_frame1.eth_type = 0x0800
test_frame1.ip_version = 4
test_frame1.ip_ihl = 5
test_frame1.ip_dscp = 0
test_frame1.ip_ecn = 0
test_frame1.ip_length = None
test_frame1.ip_identification = 0
test_frame1.ip_flags = 2
test_frame1.ip_fragment_offset = 0
test_frame1.ip_ttl = 64
test_frame1.ip_protocol = 0x11
test_frame1.ip_header_checksum = None
test_frame1.ip_source_ip = 0xc0a80181
test_frame1.ip_dest_ip = 0xc0a80180
test_frame1.udp_source_port = 1234
test_frame1.udp_dest_port = 14000
test_frame1.payload = pkt1.build_axis()
test_frame1.build()
test_frame2 = udp_ep.UDPFrame(test_frame1)
test_frame2.payload = pkt2.build_axis()
test_frame2.build()
mii_source.send(b'\x55\x55\x55\x55\x55\x55\x55\xD5' +
test_frame1.build_eth().build_axis_fcs().data)
mii_source.send(b'\x55\x55\x55\x55\x55\x55\x55\xD5' +
test_frame2.build_eth().build_axis_fcs().data)
rx_frame = None
while rx_frame is None:
yield clk.posedge
rx_frame = mii_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis_fcs(rx_frame.data[8:])
check_frame = udp_ep.UDPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis(check_frame.payload.data)
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack('<BH', 0, 4)
rx_frame = None
while rx_frame is None:
yield clk.posedge
rx_frame = mii_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis_fcs(rx_frame.data[8:])
check_frame = udp_ep.UDPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis(check_frame.payload.data)
print(rx_pkt)
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack('<BH', 0,
4) + b'\x11\x22\x33\x44'
assert mii_source.empty()
assert mii_sink.empty()
yield delay(100)
yield clk.posedge
print("test 3: enumerate via UART")
current_test.next = 3
pkt = xfcp.XFCPFrame()
pkt.path = []
pkt.rpath = []
pkt.ptype = 0xfe
pkt.payload = b''
uart_source.write(pkt.build_axis_cobs().data + b'\x00')
yield clk.posedge
rx_data = b''
while True:
if not uart_sink.empty():
b = bytearray(uart_sink.read(1))
rx_data += b
if b[0] == 0:
break
yield clk.posedge
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis_cobs(rx_data[:-1])
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert rx_pkt.path == []
assert rx_pkt.rpath == []
assert len(rx_pkt.payload.data) == 64
pkt = xfcp.XFCPFrame()
pkt.path = [0]
pkt.rpath = []
pkt.ptype = 0xfe
pkt.payload = b''
uart_source.write(pkt.build_axis_cobs().data + b'\x00')
yield clk.posedge
rx_data = b''
while True:
if not uart_sink.empty():
b = bytearray(uart_sink.read(1))
rx_data += b
if b[0] == 0:
break
yield clk.posedge
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis_cobs(rx_data[:-1])
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert rx_pkt.path == [0]
assert rx_pkt.rpath == []
assert len(rx_pkt.payload.data) == 32
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
yield clk.posedge
print("test 1: downstream packets")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.ptype = 1
pkt.path = [1, 2, 3]
pkt.payload = bytearray(range(8))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port_list[0].send(pkt)
yield clk.posedge
up_xfcp_port_list[1].send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = down_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.rpath.insert(0, 0)
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = down_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.rpath.insert(0, 1)
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 2: upstream packets")
current_test.next = 2
pkt0 = xfcp.XFCPFrame()
pkt0.ptype = 1
pkt0.path = [1, 2, 3]
pkt0.rpath = [0]
pkt0.payload = bytearray(range(8))
pkt1 = xfcp.XFCPFrame(pkt0)
pkt1.rpath = [1]
for wait in wait_normal, wait_pause_source, wait_pause_sink:
down_xfcp_port.send(pkt0)
down_xfcp_port.send(pkt1)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port_list[0].recv()
check_pkt = xfcp.XFCPFrame(pkt0)
check_pkt.rpath = check_pkt.rpath[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = up_xfcp_port_list[1].recv()
check_pkt = xfcp.XFCPFrame(pkt1)
check_pkt.rpath = check_pkt.rpath[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 3: downstream packets, various path and rpath")
current_test.next = 3
for p in range(3):
for rp in range(3):
pkt = xfcp.XFCPFrame()
pkt.ptype = 1
pkt.path = list(range(1, p + 1))
pkt.rpath = list(range(1 + p, rp + p + 1))
pkt.payload = bytearray(range(8))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port_list[0].send(pkt)
yield clk.posedge
up_xfcp_port_list[1].send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = down_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.rpath.insert(0, 0)
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = down_xfcp_port.recv()
check_pkt = xfcp.XFCPFrame(pkt)
check_pkt.rpath.insert(0, 1)
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 4: upstream packets, various path and rpath")
current_test.next = 4
for p in range(3):
for rp in range(3):
pkt0 = xfcp.XFCPFrame()
pkt0.ptype = 1
pkt0.path = list(range(1, p + 1))
pkt0.rpath = [0] + list(range(1 + p, rp + p + 1))
pkt0.payload = bytearray(range(8))
pkt1 = xfcp.XFCPFrame(pkt0)
pkt1.rpath = [1] + list(range(1 + p, rp + p + 1))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
down_xfcp_port.send(pkt0)
down_xfcp_port.send(pkt1)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port_list[0].recv()
check_pkt = xfcp.XFCPFrame(pkt0)
check_pkt.rpath = check_pkt.rpath[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
rx_pkt = up_xfcp_port_list[1].recv()
check_pkt = xfcp.XFCPFrame(pkt1)
check_pkt.rpath = check_pkt.rpath[1:]
print(rx_pkt)
assert rx_pkt == check_pkt
yield delay(100)
yield clk.posedge
print("test 5: test invalid packets")
current_test.next = 5
pkt1 = xfcp.XFCPFrame()
pkt1.rpath = [10]
pkt1.ptype = 1
pkt1.payload = bytearray(range(8))
pkt2 = xfcp.XFCPFrame()
pkt2.path = [0] * 40
pkt2.rpath = [0]
pkt2.ptype = 1
pkt2.payload = bytearray(range(8))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
down_xfcp_port.send(pkt1)
down_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port_list[0].recv()
assert rx_pkt is None
rx_pkt = up_xfcp_port_list[1].recv()
assert rx_pkt is None
rx_pkt = down_xfcp_port.recv()
assert rx_pkt is None
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
local_mac.next = 0x020000000000
local_ip.next = 0xc0a80180
local_port.next = 14000
gateway_ip.next = 0xc0a80101
subnet_mask.next = 0xffffff00
yield clk.posedge
print("test 1: test UDP RX packet")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.path = [1, 2, 3]
pkt.rpath = [4]
pkt.ptype = 1
pkt.payload = bytearray(range(32))
test_frame = udp_ep.UDPFrame()
test_frame.eth_dest_mac = 0x020000000000
test_frame.eth_src_mac = 0xDAD1D2D3D4D5
test_frame.eth_type = 0x0800
test_frame.ip_version = 4
test_frame.ip_ihl = 5
test_frame.ip_dscp = 0
test_frame.ip_ecn = 0
test_frame.ip_length = None
test_frame.ip_identification = 0
test_frame.ip_flags = 2
test_frame.ip_fragment_offset = 0
test_frame.ip_ttl = 64
test_frame.ip_protocol = 0x11
test_frame.ip_header_checksum = None
test_frame.ip_source_ip = 0xc0a80181
test_frame.ip_dest_ip = 0xc0a80180
test_frame.udp_source_port = 1234
test_frame.udp_dest_port = 14000
test_frame.payload = pkt.build_axis()
test_frame.build()
eth_source.send(test_frame.build_eth().build_axis())
yield down_xfcp_port.wait()
rx_pkt = down_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt == pkt
assert eth_source.empty()
assert eth_sink.empty()
yield delay(100)
yield clk.posedge
print("test 2: test UDP TX packet")
current_test.next = 2
pkt = xfcp.XFCPFrame()
pkt.path = [1, 2, 3]
pkt.rpath = [4]
pkt.ptype = 1
pkt.payload = bytearray(range(32))
down_xfcp_port.send(pkt)
# wait for ARP request packet
yield eth_sink.wait()
rx_frame = eth_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis(rx_frame.data)
check_frame = arp_ep.ARPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
assert check_frame.eth_dest_mac == 0xFFFFFFFFFFFF
assert check_frame.eth_src_mac == 0x020000000000
assert check_frame.eth_type == 0x0806
assert check_frame.arp_htype == 0x0001
assert check_frame.arp_ptype == 0x0800
assert check_frame.arp_hlen == 6
assert check_frame.arp_plen == 4
assert check_frame.arp_oper == 1
assert check_frame.arp_sha == 0x020000000000
assert check_frame.arp_spa == 0xc0a80180
assert check_frame.arp_tha == 0x000000000000
assert check_frame.arp_tpa == 0xc0a80181
# generate response
arp_frame = arp_ep.ARPFrame()
arp_frame.eth_dest_mac = 0x020000000000
arp_frame.eth_src_mac = 0xDAD1D2D3D4D5
arp_frame.eth_type = 0x0806
arp_frame.arp_htype = 0x0001
arp_frame.arp_ptype = 0x0800
arp_frame.arp_hlen = 6
arp_frame.arp_plen = 4
arp_frame.arp_oper = 2
arp_frame.arp_sha = 0xDAD1D2D3D4D5
arp_frame.arp_spa = 0xc0a80181
arp_frame.arp_tha = 0x020000000000
arp_frame.arp_tpa = 0xc0a80180
eth_source.send(arp_frame.build_eth().build_axis())
yield eth_sink.wait()
rx_frame = eth_sink.recv()
check_eth_frame = eth_ep.EthFrame()
check_eth_frame.parse_axis(rx_frame.data)
check_frame = udp_ep.UDPFrame()
check_frame.parse_eth(check_eth_frame)
print(check_frame)
assert check_frame.eth_dest_mac == 0xDAD1D2D3D4D5
assert check_frame.eth_src_mac == 0x020000000000
assert check_frame.eth_type == 0x0800
assert check_frame.ip_version == 4
assert check_frame.ip_ihl == 5
assert check_frame.ip_dscp == 0
assert check_frame.ip_ecn == 0
assert check_frame.ip_identification == 0
assert check_frame.ip_flags == 2
assert check_frame.ip_fragment_offset == 0
assert check_frame.ip_ttl == 64
assert check_frame.ip_protocol == 0x11
assert check_frame.ip_source_ip == 0xc0a80180
assert check_frame.ip_dest_ip == 0xc0a80181
assert check_frame.udp_source_port == 14000
assert check_frame.udp_dest_port == 1234
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis(check_frame.payload.data)
print(rx_pkt)
assert rx_pkt == pkt
assert eth_source.empty()
assert eth_sink.empty()
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
prescale.next = 1
# testbench stimulus
yield clk.posedge
print("test 1: receive")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.path = [1, 2, 3]
pkt.rpath = [4]
pkt.ptype = 1
pkt.payload = bytearray(range(32))
uart_source.write(pkt.build_axis_cobs().data + b'\x00')
rx_pkt = None
while rx_pkt is None:
yield clk.posedge
rx_pkt = down_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt == pkt
yield delay(100)
yield clk.posedge
print("test 2: transmit")
current_test.next = 2
pkt = xfcp.XFCPFrame()
pkt.path = [1, 2, 3]
pkt.rpath = [4]
pkt.ptype = 1
pkt.payload = bytearray(range(32))
down_xfcp_port.send(pkt)
yield clk.posedge
rx_data = b''
while True:
if not uart_sink.empty():
b = bytearray(uart_sink.read(1))
rx_data += b
if b[0] == 0:
break
yield clk.posedge
rx_pkt = xfcp.XFCPFrame()
rx_pkt.parse_axis_cobs(rx_data[:-1])
print(rx_pkt)
assert rx_pkt == pkt
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
yield clk.posedge
print("test 1: test write")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x12
pkt.payload = bytearray(struct.pack('<IH', 0, 4) + b'\x11\x22\x33\x44')
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
data = axil_ram_inst.read_mem(0, 32)
for i in range(0, len(data), 16):
print(" ".join(
("{:02x}".format(c) for c in bytearray(data[i:i + 16]))))
assert axil_ram_inst.read_mem(0, 4) == b'\x11\x22\x33\x44'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack('<IH', 0, 4)
yield delay(100)
yield clk.posedge
print("test 2: test read")
current_test.next = 2
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x10
pkt.payload = bytearray(struct.pack('<IH', 0, 4))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack('<IH', 0,
4) + b'\x11\x22\x33\x44'
yield delay(100)
yield clk.posedge
print("test 3: various writes")
current_test.next = 3
for length in range(1, 8):
for offset in range(4):
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x12
pkt.payload = bytearray(
struct.pack('<IH', 256 *
(16 * offset + length) + offset, length) +
b'\x11\x22\x33\x44\x55\x66\x77\x88'[0:length])
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
data = axil_ram_inst.read_mem(256 * (16 * offset + length),
32)
for i in range(0, len(data), 16):
print(" ".join(("{:02x}".format(c)
for c in bytearray(data[i:i + 16]))))
assert axil_ram_inst.read_mem(
256 * (16 * offset + length) + offset, length
) == b'\x11\x22\x33\x44\x55\x66\x77\x88'[0:length]
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack(
'<IH', 256 * (16 * offset + length) + offset, length)
yield delay(100)
yield clk.posedge
print("test 4: various reads")
current_test.next = 4
for length in range(1, 8):
for offset in range(4):
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x10
pkt.payload = bytearray(
struct.pack('<IH', 256 * (16 * offset + length) + offset,
length))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack(
'<IH', 256 * (16 * offset + length) + offset,
length) + b'\x11\x22\x33\x44\x55\x66\x77\x88'[0:length]
yield delay(100)
yield clk.posedge
print("test 5: test trailing padding")
current_test.next = 5
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0x12
pkt1.payload = bytearray(struct.pack('<IH', 7, 1) + b'\xAA')
pkt2 = xfcp.XFCPFrame()
pkt2.ptype = 0x12
pkt2.payload = bytearray(
struct.pack('<IH', 8, 1) + b'\xBB' + b'\x00' * 8)
pkt3 = xfcp.XFCPFrame()
pkt3.ptype = 0x10
pkt3.payload = bytearray(struct.pack('<IH', 7, 1) + b'\x00' * 8)
pkt4 = xfcp.XFCPFrame()
pkt4.ptype = 0x10
pkt4.payload = bytearray(struct.pack('<IH', 7, 1) + b'\x00' * 1)
pkt5 = xfcp.XFCPFrame()
pkt5.ptype = 0x12
pkt5.payload = bytearray(struct.pack('<IH', 9, 1) + b'\xCC')
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
up_xfcp_port.send(pkt3)
up_xfcp_port.send(pkt4)
up_xfcp_port.send(pkt5)
yield clk.posedge
yield wait()
yield clk.posedge
data = axil_ram_inst.read_mem(0, 32)
for i in range(0, len(data), 16):
print(" ".join(
("{:02x}".format(c) for c in bytearray(data[i:i + 16]))))
assert axil_ram_inst.read_mem(7, 3) == b'\xAA\xBB\xCC'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack('<IH', 7, 1)
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack('<IH', 8, 1)
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack('<IH', 7, 1) + b'\xAA'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack('<IH', 7, 1) + b'\xAA'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x13
assert rx_pkt.payload.data == struct.pack('<IH', 9, 1)
yield delay(100)
yield clk.posedge
print("test 6: test id")
current_test.next = 6
pkt = xfcp.XFCPFrame()
pkt.ptype = 0xFE
pkt.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 7: test id with trailing bytes")
current_test.next = 7
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0xFE
pkt1.payload = b'\0' * 256
pkt2 = xfcp.XFCPFrame()
pkt2.ptype = 0xFE
pkt2.payload = b'\0' * 8
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 8: test with rpath")
current_test.next = 8
pkt1 = xfcp.XFCPFrame()
pkt1.rpath = [1, 2, 3]
pkt1.ptype = 0xFE
pkt1.payload = b'\0' * 8
pkt2 = xfcp.XFCPFrame()
pkt2.rpath = [4, 5, 6]
pkt2.ptype = 0x10
pkt2.payload = bytearray(struct.pack('<IH', 0, 4))
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.rpath == [1, 2, 3]
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.rpath == [4, 5, 6]
assert rx_pkt.ptype == 0x11
assert rx_pkt.payload.data == struct.pack('<IH', 0,
4) + b'\x11\x22\x33\x44'
yield delay(100)
yield clk.posedge
print("test 9: test invalid packets")
current_test.next = 9
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0x99
pkt1.payload = b'\x00' * 8
pkt2 = xfcp.XFCPFrame()
pkt2.path = [0]
pkt2.ptype = 0xFE
pkt2.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
assert rx_pkt is None
yield delay(100)
raise StopSimulation
def check():
yield delay(100)
yield clk.posedge
rst.next = 1
yield clk.posedge
rst.next = 0
yield clk.posedge
yield delay(100)
yield clk.posedge
# testbench stimulus
yield clk.posedge
print("test 1: write")
current_test.next = 1
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x2C
pkt.payload = b'\xD0\x1C\x06\x00\x04\x11\x22\x33\x44'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
data = i2c_mem1.read_mem(0, 32)
for i in range(0, len(data), 16):
print(" ".join(
("{:02x}".format(c) for c in bytearray(data[i:i + 16]))))
assert i2c_mem1.read_mem(4, 4) == b'\x11\x22\x33\x44'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\xD0\x1C\x06\x00\x04\x11\x22\x33\x44'
yield delay(100)
yield clk.posedge
print("test 2: read")
current_test.next = 2
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x2C
pkt.payload = b'\xD0\x14\x02\x00\x04\x1A\x04'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\xD0\x14\x02\x00\x04\x1A\x04\x11\x22\x33\x44'
yield delay(100)
yield clk.posedge
print("test 3: write to slave 2")
current_test.next = 3
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x2C
pkt.payload = b'\xD1\x04\x00\x04\x04\x04\x44\x04\x33\x04\x22\x0C\x11'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
data = i2c_mem2.read_mem(0, 32)
for i in range(0, len(data), 16):
print(" ".join(
("{:02x}".format(c) for c in bytearray(data[i:i + 16]))))
assert i2c_mem2.read_mem(4, 4) == b'\x44\x33\x22\x11'
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\xD1\x04\x00\x04\x04\x04\x44\x04\x33\x04\x22\x0C\x11'
yield delay(100)
yield clk.posedge
print("test 4: read from slave 2")
current_test.next = 4
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x2C
pkt.payload = b'\xD1\x04\x00\x04\x04\x02\x02\x02\x0A'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\xD1\x04\x00\x04\x04\x02\x44\x02\x33\x02\x22\x0A\x11'
yield delay(100)
yield clk.posedge
print("test 5: test configuration and status")
current_test.next = 5
pkt = xfcp.XFCPFrame()
pkt.ptype = 0x2C
pkt.payload = b'\x60\x04\x00\x60\x01\x00\x40'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\x60\x04\x00\x60\x01\x00\x40\x00'
yield delay(100)
yield clk.posedge
print("test 6: test id")
current_test.next = 6
pkt = xfcp.XFCPFrame()
pkt.ptype = 0xFE
pkt.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 7: test id with trailing bytes")
current_test.next = 7
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0xFE
pkt1.payload = b'\0' * 256
pkt2 = xfcp.XFCPFrame()
pkt2.ptype = 0xFE
pkt2.payload = b'\0' * 8
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
yield delay(100)
yield clk.posedge
print("test 8: test with rpath")
current_test.next = 8
pkt1 = xfcp.XFCPFrame()
pkt1.rpath = [1, 2, 3]
pkt1.ptype = 0xFE
pkt1.payload = b'\0' * 8
pkt2 = xfcp.XFCPFrame()
pkt2.rpath = [4, 5, 6]
pkt2.ptype = 0x2C
pkt2.payload = b'\xD0\x04\x00\x04\x04\x02\x02\x02\x0A'
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.rpath == [1, 2, 3]
assert rx_pkt.ptype == 0xff
assert len(rx_pkt.payload.data) == 32
rx_pkt = up_xfcp_port.recv()
print(rx_pkt)
assert rx_pkt.rpath == [4, 5, 6]
assert rx_pkt.ptype == 0x2D
assert rx_pkt.payload.data == b'\xD0\x04\x00\x04\x04\x02\x11\x02\x22\x02\x33\x0A\x44'
yield delay(100)
yield clk.posedge
print("test 9: test invalid packets")
current_test.next = 9
pkt1 = xfcp.XFCPFrame()
pkt1.ptype = 0x99
pkt1.payload = b'\x00' * 8
pkt2 = xfcp.XFCPFrame()
pkt2.path = [0]
pkt2.ptype = 0xFE
pkt2.payload = b''
for wait in wait_normal, wait_pause_source, wait_pause_sink:
up_xfcp_port.send(pkt1)
up_xfcp_port.send(pkt2)
yield clk.posedge
yield wait()
yield clk.posedge
rx_pkt = up_xfcp_port.recv()
assert rx_pkt is None
yield delay(100)
raise StopSimulation