def build_xst (target, source, env):
"""Create .xst file, which contains the full command line for xst,
and .prj file, which contains a list of files involved"""
xst_filename = str(target[0])
prj_filename = os.path.splitext(xst_filename)[0]+'.prj'
coregen_files= get_project_files(str(source[0]),'FILE_COREGEN', 0)
coregen_dirs = ['"'+os.path.abspath(os.path.dirname(f))+'"' for f in coregen_files]
coregen_dirs = seq_dedup(coregen_dirs)
coregen_dir_fmt = "{"+' '.join(coregen_dirs)+" }"
try:
options=env['PROJFILE_PROPS']['Synthesize - XST']
except KeyError, e:
sys.stderr.write("Error getting synthesis options: %s\n" % (str(e)))
Exit(1)
def main(argv):
usage = "usage: %prog [options] <project_file>"
parser= optparse.OptionParser(usage=usage)
parser.add_option("-v", "--verbose", action="store_true", dest="verbose")
vc_opts = optparse.OptionGroup(parser, "Version Control Options")
vc_opts.add_option("-r","--repodir", help="repository root", metavar="DIR",
type="string", dest="repo_root")
parser.add_option_group(vc_opts)
ise_opts = optparse.OptionGroup(parser, "Xilinx ISE Options")
ise_opts.add_option("-p","--projdir", help="Project Directory", metavar="DIR",
type="string", dest="proj_root")
parser.add_option_group(ise_opts)
parser.set_defaults(repo_root="..") # NOTE That this is an odd default
parser.set_defaults(proj_root=".")
parser.set_defaults(verbose=False)
(opts, args) = parser.parse_args(argv)
if len(args) != 2:
parser.error("Incorrect command-line.")
def path_ptv (proj_rel_path):
full_proj_path = os.path.join(opts.proj_root, proj_rel_path)
vcs_relpath = os.path.relpath(full_proj_path, opts.repo_root)
return(vcs_relpath)
def path_vcs_full (vcs_rel_path):
full_vcs_path = os.path.join(opts.repo_root, vcs_rel_path)
return(full_vcs_path)
xise_file = args[1]
xil_sources = xil_ise.get_project_files(xise_file)
xil_sources_norm = [path_ptv(f) for f in xil_sources]
repo=vcs.get_repo(path=opts.repo_root)
head=repo.get_changeset()
filestates=[]
for fname in xil_sources_norm:
try:
vc_digest = hashlib.sha1(head.get_file_content(fname)).hexdigest()
real_path=path_vcs_full(fname)
f = file(real_path, 'r')
real_digest = hashlib.sha1(f.read()).hexdigest()
f.close()
if real_digest == vc_digest:
filestates.append((fname, FileStatus.EQUAL))
else:
filestates.append((fname, FileStatus.DIFFER))
except vcs.exceptions.NodeDoesNotExistError:
filestates.append((fname,FileStatus.WD_ONLY))
except IOError:
filestates.append((fname,FileStatus.VC_ONLY))
#print fname, vc_digest, real_digest
for (f,s) in filestates:
if (s != FileStatus.EQUAL) or (opts.verbose):
print ("{0:<5}:\t{1:<60}".format(formatFS(s),f))
def process_project_file (context, pfile):
"""Configuration routine. Uses the contents of FOO.xise to set
some useful properties in the build environment. Least-obviously,
we expect to find exactly one UCF file and exactly one CDC
(chipscope) file in the .xise file. More or fewer will cause
confusion. """
context.env['PROJECTFILE']=pfile
topdir = os.path.normpath(os.getcwd())
print "Expanding project file paths relative to PWD="+topdir
context.env['TOPDIR']=topdir
tree = parse(pfile)
root = tree.getroot()
props = root.find('{http://www.xilinx.com/XMLSchema}properties')
# Find chipscope files
chipscopes = get_project_files(pfile, "FILE_CDC",0)
if len(chipscopes) > 1:
print "Found > 1 chipscope files: ", chipscopes
Exit(1)
elif len(chipscopes) < 1:
context.env['CHIPSCOPE_FILE']=None
else:
context.env['CHIPSCOPE_FILE']=os.path.abspath(chipscopes[0])
# Find UCF files
ucfs = get_project_files(pfile, "FILE_UCF", 1)
if len(ucfs) != 1:
print "Found != 1 UCF files: ", ucfs
Exit(1)
context.env['UCF']=os.path.abspath(ucfs[0])
#Find properties
prop_dict = {}
for p in props.findall('{http://www.xilinx.com/XMLSchema}property'):
prop_dict[p.get('{http://www.xilinx.com/XMLSchema}name')]=p.get('{http://www.xilinx.com/XMLSchema}value')
#Part number
device = prop_dict['Device']
package = prop_dict['Package']
grade = prop_dict['Speed Grade']
partnum = "{0}{1}-{2}".format(device, grade, package)
print "Part number = " + partnum
context.env['PARTNUM']=partnum
#Working directory
wd = prop_dict['Working Directory']
context.env['WORK_DIR'] = wd
#Names
design_top = prop_dict['Implementation Top Instance Path']
print "Implementation Top Instance: " +design_top
context.env['FILE_STEM']=design_top.strip('/')
#Include dirs
include_dirs = prop_dict["Verilog Include Directories"]
context.env['INCLUDE_DIRS'] = include_dirs
context.env['gp'] = prop_dict["Generics, Parameters"]
