def set_bias_voltage(channel, voltage, sc):
v = float(voltage)
c = int(channel)
#print "channel=%d" % c
#print "voltage=%f" % v
adc_val = int(4096.*v/2.5/2.)
# Vout = 2*Vref*x/4096
# Vref = 2.5V
if adc_val < 0 or adc_val > 4095:
"ADC value out of range, possible values are 0 ... 4.99 V"
#print "ADC value=0x%x" % adc_val
i2c_address = 0xA8320000
# a write access looks like:
# - I2C address
# - pointer (channel address)
# - two data bytes:
# 15:14 register = 11 for the output register
# 13:2 DAC value (Vout)
# 1:0 padding = 00
i2c_data = (c & 0xFF)<<16 | 0xC000 | (adc_val & 0xFFF)<<2
# open I2C on connector 8
SlowControl.write_list(sc, 0x1877, [0xE0300000], [0x80], False)
# set the DAC value
SlowControl.write_list(sc, 0x1877, [i2c_address], [i2c_data], False)
def set_bias_voltage(channel, voltage, sc):
v = float(voltage)
c = int(channel)
#print "channel=%d" % c
#print "voltage=%f" % v
adc_val = int(4096. * v / 2.5 / 2.)
# Vout = 2*Vref*x/4096
# Vref = 2.5V
if adc_val < 0 or adc_val > 4095:
"ADC value out of range, possible values are 0 ... 4.99 V"
#print "ADC value=0x%x" % adc_val
i2c_address = 0xA8320000
# a write access looks like:
# - I2C address
# - pointer (channel address)
# - two data bytes:
# 15:14 register = 11 for the output register
# 13:2 DAC value (Vout)
# 1:0 padding = 00
i2c_data = (c & 0xFF) << 16 | 0xC000 | (adc_val & 0xFFF) << 2
# open I2C on connector 8
SlowControl.write_list(sc, 0x1877, [0xE0300000], [0x80], False)
# set the DAC value
SlowControl.write_list(sc, 0x1877, [i2c_address], [i2c_data], False)
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code master = SlowControl.SlowControl(0) SlowControl.write_list(master, 0x1977, [0x2, 0x1], [0x300, 0x1FF], False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code import time m = SlowControl.SlowControl(0) # HLVDS FEC (master) s = SlowControl.SlowControl(1) # ADC FEC (slave) # enable digital I/Os on the master SlowControl.write_list(m, 0x1977, [0x2, 0x1], [0x300, 0x1FF], False) # enable slave SlowControl.write_burst(s, 6039, 0x3, [0x1], False) time.sleep(1) # enable sync on the master # start readout SlowControl.write_list(m, 6039, [0x19, 0x16], [0x1, 0x1], False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code import time m = SlowControl.SlowControl(0) # HLVDS FEC (master) # request a single event # in order to make the trigger/timer unit running, 0x4 (3rd bit) in # register 0x15 has to be set SlowControl.write_list(m, 6039, [ 0x16 ], [ 0x6 ], True, False) SlowControl.write_list(m, 6039, [ 0x16 ], [ 0x4 ], True, False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code import time m = SlowControl.SlowControl(0) # HLVDS FEC (master) # request a single event # in order to make the trigger/timer unit running, 0x4 (3rd bit) in # register 0x15 has to be set SlowControl.write_list(m, 6039, [0x16], [0x6], True, False) SlowControl.write_list(m, 6039, [0x16], [0x4], True, False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code master = SlowControl.SlowControl(0) #slave = SlowControl.SlowControl(1) ### TESTING USING THE FUNCTIONS #SlowControl.read_burst(master, 6007, 0, 24, False) #addresses = [ 0x15, 0x16, 0x17, 0x18, 0x19, 0x20, 0x21, 0x22, 0x23 ] #SlowControl.read_list(master, 6039, addresses, False) #SlowControl.write_burst(master, 0x1977, 0x00000100, [ 0x3200 ], False) SlowControl.write_list(master, 6039, [ 0x18, 0x16 ], [ 0x2, 0x1 ], False) #addresses = [ 26, 27, 28 ] #SlowControl.write_list(master, 6039, addresses, data, False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code import time sc = SlowControl.SlowControl(1) SlowControl.write_list(sc, 6007, [ 0xFFFFFFFF ], [ 0xFFFF8000 ], False, False) quit()
#! /usr/bin/env python
##
## code testing of class SlowControl
##
import SlowControl # slow control code
import time
sc = SlowControl.SlowControl(1)
rply = SlowControl.read_burst(sc, 6039, 7, 1)
dcm_status = 0x3FFFF
while rply.success == False or rply.errors[0] != 0x0 or rply.data[0] != dcm_status:
print "Rebooting FEC ADC as it doesn't seem to be ready!"
if rply.success == True:
print "DCM status: 0x%x" % rply.data[0]
else:
print "Readout not successful!"
SlowControl.write_list(sc, 6007, [0xFFFFFFFF], [0xFFFF8000])
time.sleep(15)
rply = SlowControl.read_burst(sc, 6039, 7, 1)
print "ADC DCM seems to be alright"
quit()
#! /usr/bin/env python
##
## code testing of class SlowControl
##
import SlowControl # slow control code
dHLVDS = SlowControl.SlowControl(0)
dADC = SlowControl.SlowControl(1)
# HLVDS: trigger is in register 24
# 1: 0 triggering mode: 0 = auto, 1 = ext 2 = TLU
# 2 TLU reset signal enable
# 3 busy mode: 0 = excluding driver, 1 = including driver
# 10: 4 clk div
# 18:12 wait length
trg_set = 2 # = TLU + busy w/o driver
trg_set = trg_set | (0x18 << 4
) # clk divider (0x18) (minimum working 0x5 in the lab)
trg_set = trg_set | (0x2f << 12) # wait length (0x2f)
SlowControl.write_list(dHLVDS, 6039, [24], [trg_set], False)
SlowControl.write_list(dADC, 6039, [2], [trg_set], False)
quit()
#! /usr/bin/env python
##
## code testing of class SlowControl
##
import SlowControl # slow control code
master = SlowControl.SlowControl(0)
# open I2C on connector 8
SlowControl.write_list(master, 0x1877, [0xE0300000], [0x80], False)
# set the reset voltages
# 12 bit precision
# Vout = 2*Vref*x/4096
# Vref = 2.5V
#
# value has to be shifted two bits to the left (*4) (see explanation below)
#
# 0x51e = 0.4V
# 0xa3c = 0.8V
#
# a write access looks like:
# - I2C address
# - pointer (channel address)
# - two data bytes:
# 15:14 register = 11 for the output register
# 13:2 DAC value (Vout)
# 1:0 padding = 00
SlowControl.write_list(master, 0x1877,
[0xA8320000, 0xA8320000, 0xA8320000, 0xA8320000],
[0x03CA3C, 0x06CA3C, 0x07CA3C, 0x0BCA3C], False)
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code import time m = SlowControl.SlowControl(0) # HLVDS FEC (master) s = SlowControl.SlowControl(1) # ADC FEC (slave) # enable digital I/Os on the master SlowControl.write_list(m, 0x1977, [0x2, 0x1], [ 0x300, 0x100 ], False) # disaable sync on the master # stop readout SlowControl.write_list(m, 6039, [ 0x16, 0x19 ], [ 0x0, 0x0 ], False) time.sleep(1) # disable slave SlowControl.write_burst(s, 6039, 0x3, [ 0x0 ], False) quit()
#! /usr/bin/env python ## ## synchronous reset via slow control of the FEC HLVDS ## import SlowControl # slow control code sc = SlowControl.SlowControl(0) # send a reset pulse of 1 us to all parts of the application unit, # with a synchronous reset # # bit 0: complete synchronous reset # 1: send reset to all asynchronous reset lines # 2: reset the DUT driver only # 3: reset the trigger unit # 4: reset the timer # reset register is located at the address 0xFFFFFFFF # value: # 15 downto 0: reset signal lines # 23 downto 16: length of the reset pulse (x+1)*100ns # 31 downto 24: ??? # issue asynchronous reset for 1 us: SlowControl.write_list(sc, 6039, [0xFFFFFFFF], [0x90002], False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code dADC = SlowControl.SlowControl(1) #SlowControl.write_burst(dADC, 6519, 0x1, [0x0, 0x0, 0x0, 0x0], False) SlowControl.write_list(dADC, 6519, [0x2, 0x3, 0x4], [0x0, 0x0, 0x0], False) # 01 = power down CH0 # 02 = power down CH1 # 03 = equalizer level 0 # 04 = equalizer level 1 # 05 = TRGOUT enable # 06 = BCLK enable # Register Bit 7 6 5 4 3 2 1 0 # HDMI connector 4 5 6 7 0 1 2 3 quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code dADC = SlowControl.SlowControl(1) #SlowControl.write_burst(dADC, 6519, 0x1, [0x0, 0x0, 0x0, 0x0], False) SlowControl.write_list(dADC, 6519, [0x2, 0x3, 0x4], [0x0, 0x0, 0x0], False) # 01 = power down CH0 # 02 = power down CH1 # 03 = equalizer level 0 # 04 = equalizer level 1 # 05 = TRGOUT enable # 06 = BCLK enable # Register Bit 7 6 5 4 3 2 1 0 # HDMI connector 4 5 6 7 0 1 2 3 quit()
#! /usr/bin/env python ## ## starting continous readout of the FEC HLVDS only ## import SlowControl # slow control code m = SlowControl.SlowControl(0) # HLVDS FEC (master) # enable digital I/Os on the master SlowControl.write_list(m, 0x1977, [0x2, 0x1], [ 0x300, 0x1FF ], False) # enable sync on the master # start readout SlowControl.write_list(m, 6039, [ 0x16 ], [ 0x1 ], False) quit()
#! /usr/bin/env python ## ## code testing of class SlowControl ## import SlowControl # slow control code dHLVDS = SlowControl.SlowControl(0) dADC = SlowControl.SlowControl(1) # HLVDS: trigger is in register 24 # 1: 0 triggering mode: 0 = auto, 1 = ext 2 = TLU # 2 TLU reset signal enable # 3 busy mode: 0 = excluding driver, 1 = including driver # 10: 4 clk div # 18:12 wait length trg_set = 2 # = TLU + busy w/o driver trg_set = trg_set | (0x18 << 4) # clk divider (0x18) (minimum working 0x5 in the lab) trg_set = trg_set | (0x2F << 12) # wait length (0x2f) SlowControl.write_list(dHLVDS, 6039, [24], [trg_set], False) SlowControl.write_list(dADC, 6039, [2], [trg_set], False) quit()
#! /usr/bin/env python
##
## code testing of class SlowControl
##
import SlowControl # slow control code
import time
sc = SlowControl.SlowControl(1)
rply = SlowControl.read_burst(sc, 6039, 7, 1)
dcm_status = 0x3ffff
while rply.success == False or rply.errors[0] != 0x0 or rply.data[0] != dcm_status:
print "Rebooting FEC ADC as it doesn't seem to be ready!"
if rply.success == True:
print "DCM status: 0x%x" % rply.data[0]
else:
print "Readout not successful!"
SlowControl.write_list(sc, 6007, [ 0xFFFFFFFF ], [ 0xFFFF8000 ])
time.sleep(15)
rply = SlowControl.read_burst(sc, 6039, 7, 1)
print "ADC DCM seems to be alright"
quit()
