def test_parallel_gate_family_eq(): eq = cirq.testing.EqualsTester() for name, description in [(None, None), ("Custom Name", "Custom Description")]: eq.add_equality_group( cirq.ParallelGateFamily(CustomX, max_parallel_allowed=2, name=name, description=description), cirq.ParallelGateFamily(cirq.ParallelGate(CustomX, 2), name=name, description=description), ) eq.add_equality_group( cirq.ParallelGateFamily(CustomXPowGate, max_parallel_allowed=2, name=name, description=description)) eq.add_equality_group( cirq.ParallelGateFamily(CustomX, max_parallel_allowed=5, name=name, description=description), cirq.ParallelGateFamily( cirq.ParallelGate(CustomX, 10), max_parallel_allowed=5, name=name, description=description, ), )
def __init__(self, include_additional_controlled_ops: bool = True): gate_families = [ cirq.ParallelGateFamily(cirq.H), cirq.ParallelGateFamily(cirq.PhasedXPowGate), cirq.ParallelGateFamily(cirq.XPowGate), cirq.ParallelGateFamily(cirq.YPowGate), cirq.ParallelGateFamily(cirq.ZPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CZPowGate), cirq.IdentityGate, cirq.MeasurementGate, ] self.include_additional_controlled_ops = include_additional_controlled_ops if self.include_additional_controlled_ops: gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CNotPowGate)) gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CCNotPowGate)) gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CCZPowGate)) # Call cirq.Gateset __init__ which is our grand-father inherited class # pylint doesn't like this so disable checks on this. # pylint: disable=bad-super-call super(cirq.neutral_atoms.NeutralAtomGateset, self).__init__(*gate_families, unroll_circuit_op=False)
def __init__(self, qubits: Sequence[cirq.Qid]) -> None: """Initializes a device with some qubits. Args: qubits (NamedQubit): Qubits on the device, exclusively unrelated to a physical position. Raises: TypeError: If the wrong qubit type is provided. ValueError: If the number of qubits is greater than the devices maximum. """ if len(qubits) > 0: q_type = type(qubits[0]) for q in qubits: if not isinstance(q, self.supported_qubit_type): raise TypeError('Unsupported qubit type: {!r}. This device ' 'supports qubit types: {}'.format( q, self.supported_qubit_type)) if not type(q) is q_type: raise TypeError("All qubits must be of same type.") if len(qubits) > self.maximum_qubit_number: raise ValueError('Too many qubits. {} accepts at most {} ' 'qubits.'.format(type(self), self.maximum_qubit_number)) self.gateset = cirq.Gateset( cirq.ParallelGateFamily(cirq.H), cirq.ParallelGateFamily(cirq.PhasedXPowGate), cirq.ParallelGateFamily(cirq.XPowGate), cirq.ParallelGateFamily(cirq.YPowGate), cirq.ParallelGateFamily(cirq.ZPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CNotPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CCNotPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CZPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CCZPowGate), cirq.IdentityGate, cirq.MeasurementGate, unroll_circuit_op=False, accept_global_phase_op=False, ) self.qubits = qubits self._metadata = cirq.DeviceMetadata( qubits, nx.from_edgelist([(a, b) for a in qubits for b in qubits if a != b]))
def __init__(self, include_additional_controlled_ops: bool = True): gate_families = [ cirq.ParallelGateFamily(cirq.H), cirq.ParallelGateFamily(cirq.PhasedXPowGate), cirq.ParallelGateFamily(cirq.XPowGate), cirq.ParallelGateFamily(cirq.YPowGate), cirq.ParallelGateFamily(cirq.ZPowGate), cirq.AnyIntegerPowerGateFamily(cirq.CZPowGate), cirq.IdentityGate, cirq.MeasurementGate, ] self.include_additional_controlled_ops = include_additional_controlled_ops if self.include_additional_controlled_ops: gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CNotPowGate)) gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CCNotPowGate)) gate_families.append( cirq.AnyIntegerPowerGateFamily(cirq.CCZPowGate)) super().__init__(*gate_families, unroll_circuit_op=False)
def test_parallel_gate_family(gate, name, description, max_parallel_allowed): gate_family = cirq.ParallelGateFamily( gate, name=name, description=description, max_parallel_allowed=max_parallel_allowed ) cirq.testing.assert_equivalent_repr(gate_family) for gate_to_test in [CustomX, cirq.ParallelGate(CustomX, 2)]: assert gate_to_test in gate_family assert gate_to_test(*cirq.LineQubit.range(cirq.num_qubits(gate_to_test))) in gate_family if isinstance(gate, cirq.ParallelGate) and not max_parallel_allowed: assert gate_family._max_parallel_allowed == cirq.num_qubits(gate) assert cirq.ParallelGate(CustomX, 4) not in gate_family else: assert gate_family._max_parallel_allowed == max_parallel_allowed assert (cirq.ParallelGate(CustomX, 4) in gate_family) == (max_parallel_allowed is None) str_to_search = 'Custom' if name else 'Parallel' assert str_to_search in gate_family.name assert str_to_search in gate_family.description