def reset(self):
"""
reset, resets the shift register back to its initial state.
INPUT:
nothing
OUTPUT:
nothing
"""
# ======== IMPLEMENTATION GOES HERE =========
r0=auxillary.parityWordChecksum(self.dh_key)
self.r_i=r0
# ======== END IMPLEMENTATION ===============
return None
def __init__(self, dh_key, dh_p, p1, p2):
"""
__init__, constructor for StreamCipher class.
INPUT:
dh_key, 2048bit DH Key from Part A1
p, DH Key Parameter, Prime Modulus
OUTPUT:
returns an instantiated StreamCipher object
"""
# ======== IMPLEMENTATION GOES HERE =========
self.dh_key = dh_key # 2048bit DH Key from Part A1
self.p = dh_p # DH Key Parameter, Prime Modulus
self.a = auxillary.deriveSupplementaryKey(self.dh_key,p1) # Supplementary Key A for Stream Cipher
self.b = auxillary.deriveSupplementaryKey(self.dh_key,p2) # Supplementary Key B for Stream Cipher
self.r_i = auxillary.parityWordChecksum(self.dh_key)# Shift Register
