def test_simulation():
logging.getLogger().setLevel(logging.DEBUG)
logging.info('hello\n')
n1 = dpsim.dp.Node('n1')
gnd = dpsim.dp.Node.GND()
r = dpsim.dp.ph1.Resistor('r1', [gnd, n1])
sys = dpsim.SystemTopology(50, [n1], [r])
sim = dpsim.Simulation(__name__,
sys,
duration=10,
rt=True,
pbar=True,
single_stepping=True)
sim.step()
assert sim.wait_until() == Event.starting
assert sim.wait_until() == Event.running
assert sim.wait_until() == Event.paused
for x in range(2, 10):
sim.step()
assert sim.wait_until() == Event.resuming
assert sim.wait_until() == Event.running
assert sim.wait_until() == Event.paused
assert sim.steps == x
sim.stop()
assert sim.wait_until() == Event.stopping
assert sim.wait_until() == Event.stopped
def test_async():
el = asyncio.get_event_loop()
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node('n1')
# Components
v1 = dpsim.dp.ph1.VoltageSource('v_1', [gnd, n1], V_ref=complex(10, 0))
r1 = dpsim.dp.ph1.Resistor('r_1', [n1, gnd], R=1)
system = dpsim.SystemTopology(50, [gnd, n1], [v1, r1])
start = dt.datetime.now() + dt.timedelta(seconds=4)
sim = dpsim.RealTimeSimulation(__name__,
system,
duration=10,
timestep=0.0005) #, start_time=start)
# Start in two seconds!
sim.start()
sim.show_progressbar()
sim.add_callback(my_callback, sim, 1337)
# Pause the simulation after 5 sec
el.call_at(el.time() + 5, sim.pause)
# Resume after 7 sec
el.call_at(el.time() + 10, sim.start)
el.run_forever()
def test_simulation():
logging.getLogger().setLevel(logging.DEBUG)
logging.info('hello\n')
n1 = dpsim.dp.Node('n1')
gnd = dpsim.dp.Node.GND()
r = dpsim.dp.ph1.Resistor('r1', [gnd, n1])
sys = dpsim.SystemTopology(50, [n1], [r])
sim = dpsim.Simulation(__name__, sys, duration=10, pbar=True)
sim.start()
assert sim.wait_until() == Event.starting
assert sim.wait_until() == Event.running
sim.pause()
assert sim.wait_until() == Event.pausing
assert sim.wait_until() == Event.paused
steps_start = sim.steps
while sim.steps < steps_start + 100:
steps_before = sim.steps
sim.step()
assert sim.wait_until() == Event.resuming
assert sim.wait_until() == Event.running
assert sim.wait_until() == Event.paused
assert steps_before + 1 == sim.steps
sim.start()
assert sim.wait_until() == Event.resuming
assert sim.wait_until() == Event.running
sim.stop()
assert sim.wait_until() == Event.stopping
assert sim.wait_until() == Event.stopped
def run(self):
# Nodes
gnd = dpsim.dp.Node.GND()
n3 = dpsim.dp.Node('n3')
# Components
ecs = dpsim.dp.ph1.CurrentSource('i_ext', [n3, gnd], 0 + 0j)
r1 = dpsim.dp.ph1.Resistor('r_1', [n3, gnd], 1)
intf = dpsim.open_interface('/dpsim21', '/dpsim12', samplelen=2)
intf.import_attribute(ecs, 'I_ref', 1, 0, 1)
intf.export_attribute(r1, 'v_comp', 1, 0, 1)
sys = dpsim.SystemTopology(50, [gnd, n3], [ecs, r1])
sim = dpsim.Simulation('shmem2', sys, duration=1)
sim.add_interface(intf)
print('Starting simulation on right side')
sim.run()
def run(self):
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node('n1')
n2 = dpsim.dp.Node('n2')
vs = dpsim.dp.ph1.VoltageSourceNorton('v_s', [n1, gnd], 10000 + 0j, 1)
evs = dpsim.dp.ph1.VoltageSource('v_ext', [n2, gnd], 0 + 0j)
l1 = dpsim.dp.ph1.Inductor('l_1', [n1, n2], 1e-3)
intf = dpsim.open_interface('/dpsim12', '/dpsim21', samplelen=2)
intf.import_attribute(evs, 'V_ref', 1, 0, 1)
intf.export_attribute(evs, 'i_comp', 1, 0, 1)
sys = dpsim.SystemTopology(50, [gnd, n1, n2], [evs, vs, l1])
sim = dpsim.Simulation('shmem1', sys, duration=1)
sim.add_interface(intf)
print('Starting simulation on left side')
sim.run()
def test_circuit():
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node('n1')
n2 = dpsim.dp.Node('n2')
n3 = dpsim.dp.Node('n3')
# Components
v1 = dpsim.dp.ph1.VoltageSource('v_1')
v1.V_ref= complex(10, 0)
lL = dpsim.dp.ph1.Inductor('l_L')
lL.L= 0.001
rL = dpsim.dp.ph1.Resistor('r_L')
rL.R= 0.1
r1 = dpsim.dp.ph1.Resistor('r_1')
r1.R= 20
v1.connect([gnd, n1])
lL.connect([n2, n3])
rL.connect([n1, n2])
r1.connect([n3, gnd])
system = dpsim.SystemTopology(50, [gnd, n1, n2, n3], [v1, lL, rL, r1])
sim = dpsim.Simulation(__name__, system, duration=0.2, timestep=0.0005)
sim.run()
#results = rt.read_timeseries_dpsim_cmpl('Logs/' + sim.name + '_LeftVector.csv')
#expected = rt.read_timeseries_dpsim_real('Examples/Results/Simulink/Circuits/SL_' + sim.name() + '.csv')
err = 0
#err += ts.TimeSeries.rmse(expected[0], results[0].dynphasor_shift_to_emt('n1_emt', 50))
#err += ts.TimeSeries.rmse(expected[1], results[1].dynphasor_shift_to_emt('n2_emt', 50))
print('Total RMSE: %g' % (err))
assert err < 1e-4
def test_realtime():
# Nodes
gnd = dpsim.dp.Node.GND()
n1 = dpsim.dp.Node('n1')
# Components
v1 = dpsim.dp.ph1.VoltageSource('v_1')
v1.V_ref = complex(10, 0)
r1 = dpsim.dp.ph1.Resistor('r_1')
r1.R = 1
v1.connect([gnd, n1])
r1.connect([n1, gnd])
system = dpsim.SystemTopology(50, [gnd, n1], [v1, r1])
start = dt.datetime.now() + dt.timedelta(seconds=4)
print(repr(start))
sim = dpsim.RealTimeSimulation(__name__, system, duration=10, timestep=0.001, start_time=start)
sim.show_progressbar()
sim.run(pbar=True)