def main():
"""Main function."""
if ARGS.dry_run:
fy = fygen.FYGen(port=sys.stdout, device_name=ARGS.device)
else:
fy = fygen.FYGen(debug_level=ARGS.debug_level, device_name=ARGS.device)
fy.set(0, freq_hz=10000, volts=2, offset_volts=2, enable=True)
fy.set(1, freq_hz=10000, volts=2, offset_volts=-2, enable=True)
show_waves(fy, 0)
show_waves(fy, 1)
fy.set(channel=(0, 1), enable=False)
print("Done!")
def test_get_invalid_waveform_index(self):
"""Unrecognized wave index is returned by the siggen."""
fs = FakeSerial([b'100\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
with self.assertRaises(fygen.UnknownWaveformError):
fy.get(0, 'wave')
def test_data_noack_error(self):
"""Simulates the siggen not responsing to data sent."""
fs = FakeSerial([b'0\n', b'0\n', b'W\n', b'E\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
with self.assertRaises(fygen.CommandNotAcknowledgedError):
fy.set_waveform(1, values=[0.0] * 8192)
def setUp(self):
self.output = six.StringIO()
self.fy = fygen.FYGen(
port=self.output,
init_state=False,
device_name='fy2300',
)
def test_autoset(self):
"""Tests autoset functionality."""
fy = fygen.FYGen(port=self.output)
fy.set((0, 1))
val = self.output.getvalue()
self.assertIn('WMN0\n', val)
self.assertIn('WFN0\n', val)
def test_get_synchronization(self):
"""Gets all known sync modes."""
fs = FakeSerial([
b'0\n', # duty cycle
b'255\n', # freq
b'0\n', # offset_volts
b'255\n', # volts
b'0\n', # wave
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(
{
'duty_cycle': False,
'freq': True,
'offset_volts': False,
'volts': True,
'wave': False,
}, fy.get_synchronization())
self.assertEqual('RSA4\n'
'RSA1\n'
'RSA3\n'
'RSA2\n'
'RSA0\n'
'', fs.getvalue())
def test_autoset_with_args(self):
"""Tests autoset with additional arguments provided."""
fy = fygen.FYGen(port=self.output)
fy.set(wave='square', volts=0.1)
val = self.output.getvalue()
self.assertIn('WMW01\n', val)
self.assertIn('WMA0.10\n', val)
def test_get(self):
"""Calls get with no arguments."""
fs = FakeSerial([
b'50000\n', # duty cycle
b'255\n', # enable
b'12345.6789\n', # freq hz
b'12340\n', # offset volts
b'189300\n', # phase degrees
b'123400\n', # volts
b'4\n', # wave
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(
{
'duty_cycle': 0.5,
'enable': True,
'freq_hz': 12345,
'offset_volts': 12.34,
'phase_degrees': 189.3,
'volts': 12.34,
'wave': 'dc',
}, fy.get())
self.assertEqual(
'RMD\n'
'RMN\n'
'RMF\n'
'RMO\n'
'RMP\n'
'RMA\n'
'RMW\n'
'', fs.getvalue())
def test_get_freq2(self):
"""Gets the frequency in uHz."""
fs = FakeSerial([b'12345.6789\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(12345678900, fy.get(1, 'freq_uhz'))
self.assertEqual('RFF\n', fs.getvalue())
def test_send(self):
"""Tests the low-level send."""
fs = FakeSerial([b'foo\n', b'bar\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual('foo', fy.send('foocmd'))
self.assertEqual('bar', fy.send('barcmd'))
self.assertEqual('foocmd\nbarcmd\n', fs.getvalue())
def test_get_measurement_counter(self):
"""Gets the counter measurement."""
fs = FakeSerial([
b'0000000669\n', # counter
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual({'counter': 669}, fy.get_measurement({'counter'}))
def test_get_wave(self):
"""Gets the current wave."""
fs = FakeSerial([b'4\n', b'4\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual('dc', fy.get(0, 'wave'))
self.assertEqual({'wave': 'tri'}, fy.get(1, ('wave', )))
self.assertEqual('RMW\nRFW\n', fs.getvalue())
def test_freq_already_set2(self):
"""Tests that a frequency is not reset to the same thing."""
fs = FakeSerial([b'1234.5\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, freq_uhz=1234500000)
self.assertEqual('RMF\n', fs.getvalue())
def test_get_duty_cycle(self):
"""Gets the duty cycle."""
fs = FakeSerial([b'50000\n', b'10500\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(0.5, fy.get(0, 'duty_cycle'))
self.assertEqual(0.105, fy.get(1, 'duty_cycle'))
self.assertEqual('RMD\nRFD\n', fs.getvalue())
def test_phase_already_set(self):
"""Tries to set the phase to an already-set value."""
fs = FakeSerial([b'189300\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, phase_degrees=189.3)
self.assertEqual('RMP\n', fs.getvalue())
def test_get_offset_volts(self):
"""Gets the offset voltage."""
fs = FakeSerial([b'12340\n', b'4294962296\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(12.34, fy.get(0, 'offset_volts'))
self.assertEqual(-5, fy.get(1, 'offset_volts'))
self.assertEqual('RMO\nRFO\n', fs.getvalue())
def test_volts_already_set(self):
"""Tries to set the voltage to an already set value."""
fs = FakeSerial([b'56000\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, volts=5.6)
self.assertEqual('RMA\n', fs.getvalue())
def test_get_volts(self):
"""Gets the amplitude voltage."""
fs = FakeSerial([b'123400\n', b'5000\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(12.34, fy.get(0, 'volts'))
self.assertEqual(0.5, fy.get(1, 'volts'))
self.assertEqual('RMA\nRFA\n', fs.getvalue())
def test_auto_detect_on_init(self):
"""Autodetects runs on FYGen init"""
fs = FakeSerial([
b'FY6900-60\n',
])
fy = fygen.FYGen(port=fs, _port_is_serial=True)
self.assertEqual('fy6900', fy.device_name)
self.assertEqual('UMO\n', fs.getvalue())
def test_duty_cycle_already_set(self):
"""Sets the duty cycle to an already-set value."""
fs = FakeSerial([b'10500\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, duty_cycle=0.105)
self.assertEqual('RMD\n', fs.getvalue())
def test_get_enable(self):
"""Gets the current enable status."""
fs = FakeSerial([b'255\n', b'0\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(True, fy.get(0, 'enable'))
self.assertEqual(False, fy.get(1, 'enable'))
self.assertEqual('RMN\nRFN\n', fs.getvalue())
def test_wave_already_set(self):
"""Asserts a wave that is already square is not reset to square."""
fs = FakeSerial([b'1\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, wave='square')
self.assertEqual('RMW\n', fs.getvalue())
def test_get_phase_degrees(self):
"""Gets the phase angle."""
fs = FakeSerial([b'0\n', b'189300\n'])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(0, fy.get(0, 'phase_degrees'))
self.assertEqual(189.3, fy.get(1, 'phase_degrees'))
self.assertEqual('RMP\nRFP\n', fs.getvalue())
def test_offset_volts_already_set(self):
"""Tries to set the offset voltage to a value already set."""
fs = FakeSerial([b'12340\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, offset_volts=12.34)
self.assertEqual('RMO\n', fs.getvalue())
def test_already_disabled(self):
"""Tests that WMN0 is not sent if the channel is already disabled."""
fs = FakeSerial([b'0\n'])
fy = fygen.FYGen(port=fs, init_state=False)
fy.is_serial = True
fy.read_before_write = True
fy.set(0, enable=False)
self.assertEqual('RMN\n', fs.getvalue())
def test_get_model(self):
"""Gets device model."""
fs = FakeSerial([
b'fy2300\n',
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual('fy2300', fy.get_model())
self.assertEqual('UMO\n', fs.getvalue())
def test_get_synchronization_single(self):
"""Gets all known sync modes."""
fs = FakeSerial([
b'0\n', # wave
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual(False, fy.get_synchronization('wave'))
self.assertEqual('RSA0\n', fs.getvalue())
def test_set_disable(self):
"""Tests disable function on both channels."""
fy = fygen.FYGen(port=self.output,
default_channel=(0, 1),
init_state=False)
fy.set(volts=3, enable=False)
self.assertEqual('WMN0\n'
'WMA3.00\n'
'WFN0\n'
'WFA3.00\n', self.output.getvalue())
def test_get_measurement_invalid_gate_time(self):
"""siggen returns an unexpected gate time mode."""
fs = FakeSerial([
b'x\n', # gate mode = ???
b'0000000668\n', # freq_hz
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
with self.assertRaises(fygen.InvalidGateTimeError):
fy.get_measurement('freq_hz')
def test_get_id(self):
"""Gets device id."""
fs = FakeSerial([
b'12345\n',
])
fy = fygen.FYGen(port=fs)
fy.is_serial = True
self.assertEqual('12345', fy.get_id())
self.assertEqual('UID\n', fs.getvalue())
