import miasm.expression.expression as m2_expr
from miasm.ir.ir import Lifter, IRBlock, AssignBlock
from miasm.arch.mips32.arch import mn_mips32
from miasm.arch.mips32.regs import R_LO, R_HI, PC, RA, ZERO, exception_flags
from miasm.core.sembuilder import SemBuilder
from miasm.jitter.csts import EXCEPT_DIV_BY_ZERO, EXCEPT_SOFT_BP
# SemBuilder context
ctx = {"R_LO": R_LO, "R_HI": R_HI, "PC": PC, "RA": RA, "m2_expr": m2_expr}
sbuild = SemBuilder(ctx)
@sbuild.parse
def addiu(arg1, arg2, arg3):
"""Adds a register @arg3 and a sign-extended immediate value @arg2 and
stores the result in a register @arg1"""
arg1 = arg2 + arg3
@sbuild.parse
def lw(arg1, arg2):
"A word is loaded into a register @arg1 from the specified address @arg2."
arg1 = arg2
@sbuild.parse
def sw(arg1, arg2):
"The contents of @arg2 is stored at the specified address @arg1."
arg2 = arg1
IRDst = m2_expr.ExprId("IRDst", 32)
def get_next_instr(self, _):
return m2_expr.LocKey(0)
def get_next_loc_key(self, _):
return m2_expr.LocKey(0)
class Instr(object):
mode = 32
# Test
sb = SemBuilder(m2_expr.__dict__)
@sb.parse
def test(Arg1, Arg2, Arg3):
"Test docstring"
Arg1 = Arg2
mem32[Arg1] = Arg2
mem32[Arg2] = Arg3 + i32(4) - mem32[Arg1]
Arg3 = Arg3 if Arg2 else i32(0)
tmpvar = 'myop' (i32(2))
Arg2 = ('myopsize%d' % Arg1.size)(tmpvar, Arg1)
alias = Arg1[:24]
if not Arg1:
Arg2 = Arg3