def testSimpleHier(self):
top_mod = Module()
low_mod = Module()
addr_mod = Module()
top_mod.parse_rtl_file("../test/samples/rtl/sample.v")
low_mod.parse_rtl_file("../test/samples/rtl/sample2.v")
# addr_mod.parse_rtl_file("../test/samples/rtl/adder.vhd")
top_mod.sub_blocks.append(low_mod)
# top_mod.sub_blocks.append(addr_mod)
top_mod.export_rtl("my_sample.v")
def create_stub(file_name, drivezero=False):
"""
:param file_name: The module file to create the wrapper for
:param drivezero: Should the outputs be driven to zero.
:return: An empty stub module
"""
stub = Module(file_name)
for port in stub:
if port.direction == "output" and drivezero is True:
stub.add_custom_RTL("assign {} = {}'b{};".format(
port.name, port.size, "0" * port.size))
return stub.export_rtl()
def create_wrapper(file_list,
wrapper_name="top_level",
prefix=None,
suffix=None,
blackbox=False):
"""
Reads each of the rtl modules from file_list.
Creates a toplevel module with all the ports
Instance each sub module with the following rules of connecting pins:
1) if the pin is only an input to each sub module, it's an input from the top
2a) if the pin is output from more than one module, prepend inst and bring to top level
2b) if the pin is output from one module only, bring to top level
2c) if pin is output from one module and input to another, interconnect only.
2d) if pin is output from one module only and input to multiple subblocks, interconnect only
3) Repeat rules 1-3 are repeated with the prefix/suffix removed/added.
4) Repeat rules 1-4 with fuzzy matching
5) All other pins are brought to the top level with the same directionality
Black box modules only bring out pins but don't instance sub modules
Suffix/Prefix lists help to better match pins.
TODO: Pass a top level black box and hook subblocks into it.
TODO: Pass a translation function for known port name changes.
:param file_list: A list of tuples that contain HDL files to instance in the wrapper and instance names.
Give the same filename multiple times for multiple instances,
:param wrapper_name: The name to give the top level wrapper module
:param prefix: A list of known prefixes to help with port matching
:param suffix: A list of known suffixes to help with port matching
:param blackbox: Only instance the toplevel module without the sub-blocks.
:return: A new module with the sub-modules instanced and wired according to the rules above.
"""
log = logging.getLogger("WRAPPER")
logging.basicConfig(level=logging.DEBUG)
# Create the top level module
if os.path.exists(wrapper_name):
top_level = Module(wrapper_name)
else:
top_level = Module()
top_level.module_name = os.path.split(wrapper_name)[-1].split('.')[-2]
# Add all the sub modules
for (subblock_fn, inst_name) in file_list:
top_level.add_subblock(Module(subblock_fn))
top_level.sub_blocks[-1].inst_name = inst_name
for subblk in top_level.sub_blocks: # Connect each block
for blk_port in subblk: # Connect each port on the block
# Now check for internal connections or if we need to add to the toplevel.
num_outputs = output_from_all_blks(blk_port.name,
top_level.sub_blocks, prefix,
suffix)
num_inputs = input_to_all_blks(blk_port.name, top_level.sub_blocks,
prefix, suffix)
if blk_port.direction == "input":
if num_outputs == 0:
top_level.add_port_list([blk_port])
if num_inputs > 1:
log.warn(
"Input : {}:{} - From top - Single input from top to multiple instances"
.format(subblk.inst_name, blk_port.name))
else:
log.debug("Input : {}:{} - From top".format(
subblk.inst_name, blk_port.name))
elif num_outputs == 1:
log.debug("Input : {}:{} - Internal connection".format(
subblk.inst_name, blk_port.name))
blk_port.connection = remove_prefix(
remove_suffix(blk_port.name, suffix), prefix)
else:
log.warn("Input : {}:{} - Multiple drivers".format(
subblk.inst_name, blk_port.name))
elif blk_port.direction == "output":
if num_outputs == 1:
# Straight point to point internal connection or...
# One output connected to multiple inputs for internal blocks else...
# Not an internal connection, bring to the top level.
if num_inputs > 0:
log.debug(
"Output : {}:{} - Internal Single output to one or more inputs"
.format(subblk.inst_name, blk_port.name))
blk_port.connection = remove_prefix(
remove_suffix(blk_port.name, suffix), prefix)
top_level.add_wire(
rtl_port.Port(blk_port.connection, "output", "",
blk_port.size))
else:
log.debug("Output : {}:{} - To top".format(
subblk.inst_name, blk_port.name))
top_level.add_port_list([blk_port])
else:
# N outputs connected to N inputs:
if num_inputs == 0:
log.debug(
"Output : {}:{} - Multiple To top, prefix instance"
.format(subblk.inst_name, blk_port.name))
blk_port.connection = subblk.inst_name + "_" + blk_port.name
toplevelport = rtl_port.Port(blk_port.connection,
"output",
blk_port.comment,
blk_port.size)
top_level.add_port_list([toplevelport])
elif num_outputs == num_inputs:
log.warn(
"TODO: Multiple outputs connected to N input(s)")
blk_port.connection = "/* Unconnected */"
else:
log.warn(
"TODO: Multiple outputs connected to one or more input(s) need to be concatenated"
)
blk_port.connection = "/* Unconnected */"
else:
log.error("Can only handle input/output type ports")
return top_level.export_rtl()
