audio_clk = platform.request("audio_bit_clk")
m.d.comb += ClockSignal("audio_bit_clk").eq(audio_clk)
zero = Signal(10)
m.d.comb += [
nco_1.phi_inc_i.eq(self.phi_inc_2),
nco_2.phi_inc_i.eq(self.phi_inc_2),
ac97.dac_channels_i.dac_left_front.eq(Cat(zero,
nco_1.sine_wave_o)),
ac97.dac_channels_i.dac_right_front.eq(Cat(zero,
nco_2.sine_wave_o)),
]
return m
if __name__ == "__main__":
tone = Tone_synth(resolution=10, clk_frequency=100000000)
if sys.argv[1] == "convert":
path = "tone_synth_outputs"
if not os.path.exists(path):
os.makedirs(path)
out = open("tone_synth_outputs/tone_synth.v", "w")
out.write(convert(tone, ports=[tone.pwm_o.o]))
elif sys.argv[1] == "build":
ML505Platform().build(tone, do_build=False,
do_program=False).execute_local(run_script=False)
audio_clk = platform.request("audio_bit_clk")
m.d.comb += ClockSignal("audio_bit_clk").eq(audio_clk)
zero = Signal(20 - self.audio_resolution)
m.d.comb += [
nco_1.phi_inc_i.eq(self.phi_inc_2),
ac97.dac_channels_i.dac_left_front.eq(Cat(zero,
nco_1.sine_wave_o)),
ac97.dac_channels_i.dac_right_front.eq(Cat(zero,
nco_1.sine_wave_o)),
]
return m
if __name__ == "__main__":
tone = Tone_synth(count_resolution=9,
audio_resolution=20,
clk_frequency=100000000)
if sys.argv[1] == "convert":
path = "tone_synth_outputs"
if not os.path.exists(path):
os.makedirs(path)
out = open("tone_synth_outputs/tone_synth.v", "w")
out.write(convert(tone, ports=[tone.pwm_o.o]))
elif sys.argv[1] == "build":
ML505Platform().build(tone, do_build=True, do_program=False)
])
tx = platform.request("uart_tx")
trigger_led = platform.request("led", 1)
serial = platform.request("led", 2)
m.d.comb += [
trigger_led.o.eq(counter[27]),
tx.o.eq(serial_ila.tx),
serial.o.eq(serial_ila.tx)
]
return m
if __name__ == "__main__":
usb = USBSerialLoopback()
if sys.argv[1] == "build":
ML505Platform().build(usb)
#ila_frontend = AsyncSerialILAFrontend(port="COM8", ila=usb.serial_ila)
#while True:
# ila_frontend.print_samples()
if sys.argv[1] == "sim":
sim = Simulator(usb)
sim.add_clock(10e-9)
def clock():
while True:
yield
sim.add_sync_process(clock)
with sim.write_vcd("ila_waves.vcd"):