def test_immutability_n_atoms(self):
s = Slice(0, 10)
with self.assertRaises(AttributeError):
s.n_atoms = 3
def test_immutability_as_slice(self):
s = Slice(0, 10)
with self.assertRaises(AttributeError):
s.as_slice = slice(2, 10)
def test_check_hi_atom_sanity(self):
with self.assertRaises(ValueError):
# Check for slice which goes backwards
Slice(5, 4)
def test_immutability_hi_atom(self):
s = Slice(0, 10)
with self.assertRaises(AttributeError):
s.hi_atom = 3
def test_check_lo_atom_sanity(self):
# Check for value sanity
with self.assertRaises(ValueError):
# Check for negative atom
Slice(-1, 10)
def test_write_synaptic_matrix_and_master_population_table(self):
MockSimulator.setup()
# Add an sdram so max SDRAM is high enough
SDRAM(10000)
# UGLY but the mock transceiver NEED generate_on_machine to be False
AbstractGenerateConnectorOnMachine.generate_on_machine = self.say_false
default_config_paths = os.path.join(
os.path.dirname(abstract_spinnaker_common.__file__),
AbstractSpiNNakerCommon.CONFIG_FILE_NAME)
config = conf_loader.load_config(
AbstractSpiNNakerCommon.CONFIG_FILE_NAME, default_config_paths)
config.set("Simulation", "one_to_one_connection_dtcm_max_bytes", 40)
machine_time_step = 1000
pre_app_vertex = SimpleApplicationVertex(10)
pre_vertex_slice = Slice(0, 9)
pre_vertex = pre_app_vertex.create_machine_vertex(
pre_vertex_slice, None)
post_app_vertex = SimpleApplicationVertex(10)
post_vertex_slice = Slice(0, 9)
post_vertex = post_app_vertex.create_machine_vertex(
post_vertex_slice, None)
post_slice_index = 0
one_to_one_connector_1 = OneToOneConnector(None)
direct_synapse_information_1 = SynapseInformation(
one_to_one_connector_1, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 0, 1.5, 1.0)
one_to_one_connector_1.set_projection_information(
machine_time_step, direct_synapse_information_1)
one_to_one_connector_2 = OneToOneConnector(None)
direct_synapse_information_2 = SynapseInformation(
one_to_one_connector_2, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 1, 2.5, 2.0)
one_to_one_connector_2.set_projection_information(
machine_time_step, direct_synapse_information_2)
all_to_all_connector = AllToAllConnector(None)
all_to_all_synapse_information = SynapseInformation(
all_to_all_connector, pre_app_vertex, post_app_vertex, False,
False, None, SynapseDynamicsStatic(), 0, 4.5, 4.0)
all_to_all_connector.set_projection_information(
machine_time_step, all_to_all_synapse_information)
app_edge = ProjectionApplicationEdge(
pre_app_vertex, post_app_vertex, direct_synapse_information_1)
app_edge.add_synapse_information(direct_synapse_information_2)
app_edge.add_synapse_information(all_to_all_synapse_information)
machine_edge = app_edge.create_machine_edge(
pre_vertex, post_vertex, label=None)
partition_name = "TestPartition"
graph = MachineGraph("Test")
graph.add_vertex(pre_vertex)
graph.add_vertex(post_vertex)
graph.add_edge(machine_edge, partition_name)
weight_scales = [4096.0, 4096.0]
key = 0
routing_info = RoutingInfo()
routing_info.add_partition_info(PartitionRoutingInfo(
[BaseKeyAndMask(key, 0xFFFFFFF0)],
graph.get_outgoing_edge_partition_starting_at_vertex(
pre_vertex, partition_name)))
temp_spec = tempfile.mktemp()
spec_writer = FileDataWriter(temp_spec)
spec = DataSpecificationGenerator(spec_writer, None)
master_pop_sz = 1000
all_syn_block_sz = 2000
master_pop_region = 0
synapse_region = 1
direct_region = 2
spec.reserve_memory_region(master_pop_region, master_pop_sz)
spec.reserve_memory_region(synapse_region, all_syn_block_sz)
synaptic_manager = SynapticManager(
n_synapse_types=2, ring_buffer_sigma=5.0, drop_late_spikes=True,
spikes_per_second=100.0, config=config)
# Poke in our testing region IDs
synaptic_manager._pop_table_region = master_pop_region
synaptic_manager._synaptic_matrix_region = synapse_region
synaptic_manager._direct_matrix_region = direct_region
synaptic_manager._write_synaptic_matrix_and_master_population_table(
spec, [post_vertex_slice], post_slice_index, post_vertex,
post_vertex_slice, all_syn_block_sz, weight_scales,
routing_info, graph, machine_time_step)
spec.end_specification()
spec_writer.close()
spec_reader = FileDataReader(temp_spec)
executor = DataSpecificationExecutor(
spec_reader, master_pop_sz + all_syn_block_sz)
executor.execute()
master_pop_table = executor.get_region(0)
synaptic_matrix = executor.get_region(1)
direct_matrix = executor.get_region(2)
all_data = bytearray()
all_data.extend(master_pop_table.region_data[
:master_pop_table.max_write_pointer])
all_data.extend(synaptic_matrix.region_data[
:synaptic_matrix.max_write_pointer])
all_data.extend(direct_matrix.region_data[
:direct_matrix.max_write_pointer])
master_pop_table_address = 0
synaptic_matrix_address = master_pop_table.max_write_pointer
direct_synapses_address = (
synaptic_matrix_address + synaptic_matrix.max_write_pointer)
direct_synapses_address += 4
indirect_synapses_address = synaptic_matrix_address
placement = Placement(None, 0, 0, 1)
transceiver = MockTransceiverRawData(all_data)
# Get the master population table details
items = synaptic_manager._extract_synaptic_matrix_data_location(
key, master_pop_table_address, transceiver, placement)
# The first entry should be direct, but the rest should be indirect;
# the second is potentially direct, but has been restricted by the
# restriction on the size of the direct matrix
assert len(items) == 3
assert items[0][2]
assert not items[1][2]
assert not items[2][2]
data_1, row_len_1 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver, placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address, key=key,
n_rows=pre_vertex_slice.n_atoms, index=0,
using_monitors=False)
connections_1 = synaptic_manager._read_synapses(
direct_synapse_information_1, pre_vertex_slice, post_vertex_slice,
row_len_1, 0, weight_scales, data_1, None, machine_time_step)
# The first matrix is a 1-1 matrix, so row length is 1
assert row_len_1 == 1
# Check that all the connections have the right weight and delay
assert len(connections_1) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 1.5 for conn in connections_1])
assert all([conn["delay"] == 1.0 for conn in connections_1])
data_2, row_len_2 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver, placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address, key=key,
n_rows=pre_vertex_slice.n_atoms, index=1,
using_monitors=False)
connections_2 = synaptic_manager._read_synapses(
direct_synapse_information_2, pre_vertex_slice, post_vertex_slice,
row_len_2, 0, weight_scales, data_2, None, machine_time_step)
# The second matrix is a 1-1 matrix, so row length is 1
assert row_len_2 == 1
# Check that all the connections have the right weight and delay
assert len(connections_2) == post_vertex_slice.n_atoms
assert all([conn["weight"] == 2.5 for conn in connections_2])
assert all([conn["delay"] == 2.0 for conn in connections_2])
data_3, row_len_3 = synaptic_manager._retrieve_synaptic_block(
txrx=transceiver, placement=placement,
master_pop_table_address=master_pop_table_address,
indirect_synapses_address=indirect_synapses_address,
direct_synapses_address=direct_synapses_address, key=key,
n_rows=pre_vertex_slice.n_atoms, index=2,
using_monitors=False)
connections_3 = synaptic_manager._read_synapses(
all_to_all_synapse_information, pre_vertex_slice,
post_vertex_slice, row_len_3, 0, weight_scales, data_3, None,
machine_time_step)
# The third matrix is an all-to-all matrix, so length is n_atoms
assert row_len_3 == post_vertex_slice.n_atoms
# Check that all the connections have the right weight and delay
assert len(connections_3) == \
post_vertex_slice.n_atoms * pre_vertex_slice.n_atoms
assert all([conn["weight"] == 4.5 for conn in connections_3])
assert all([conn["delay"] == 4.0 for conn in connections_3])
def test_create_slice_valid(self):
"""
test creating a empty slice
"""
Slice(0, 1)
class MachineVertex(AbstractVertex, metaclass=AbstractBase):
""" A machine graph vertex.
"""
__slots__ = ["_app_vertex", "_index", "_vertex_slice"]
_DEFAULT_SLICE = Slice(0, 0)
def __init__(self,
label=None,
constraints=None,
app_vertex=None,
vertex_slice=None):
"""
:param label: The optional name of the vertex
:type label: str or None
:param iterable(AbstractConstraint) constraints:
The optional initial constraints of the vertex
:type constraints: iterable(AbstractConstraint) or None
:param app_vertex:
The application vertex that caused this machine vertex to be
created. If None, there is no such application vertex.
:type app_vertex: ApplicationVertex or None
:param vertex_slice:
The slice of the application vertex that this machine vertex
implements.
:type vertex_slice: Slice or None
:raise PacmanInvalidParameterException:
If one of the constraints is not valid
:raises PacmanValueError: If the slice of the machine_vertex is too big
:raise AttributeError:
If a not None app_vertex is not an ApplicationVertex
"""
if label is None:
label = str(type(self))
super().__init__(label, constraints)
self._added_to_graph = False
self._app_vertex = app_vertex
self._index = None
if vertex_slice is not None:
self._vertex_slice = vertex_slice
else:
self._vertex_slice = self._DEFAULT_SLICE
@property
def app_vertex(self):
""" The application vertex that caused this machine vertex to be
created. If None, there is no such application vertex.
:rtype: ApplicationVertex or None
"""
return self._app_vertex
@property
def vertex_slice(self):
""" The slice of the application vertex that this machine vertex
implements.
:rtype: Slice
"""
return self._vertex_slice
def get_n_keys_for_partition(self, _partition):
""" Get the number of keys required by the given partition of edges.
:param ~pacman.model.graphs.OutgoingEdgePartition _partition:
An partition that comes out of this vertex
:return: The number of keys required
:rtype: int
"""
return self._vertex_slice.n_atoms
@property
def index(self):
""" The index into the collection of machine vertices for an
application vertex.
:rtype: int
"""
return self._index if self._index is not None else 0
@index.setter
def index(self, value):
""" The index into the collection of machine vertices for an
application vertex.
"""
self._index = value
def __str__(self):
_l = self.label
return self.__repr__() if _l is None else _l
def __repr__(self):
if self.constraints:
return "MachineVertex(label={}, constraints={})".format(
self.label, self.constraints)
return "MachineVertex(label={})".format(self.label)
@abstractproperty
def resources_required(self):
""" The resources required by the vertex
def setUp(self):
#######################################################################
# Setting up vertices, edges and graph #
#######################################################################
self.vert1 = SimpleTestVertex(100,
"New AbstractConstrainedTestVertex 1")
self.vert2 = SimpleTestVertex(5, "New AbstractConstrainedTestVertex 2")
self.vert3 = SimpleTestVertex(3, "New AbstractConstrainedTestVertex 3")
self.edge1 = ApplicationEdge(self.vert1, self.vert2, "First edge")
self.edge2 = ApplicationEdge(self.vert2, self.vert1, "Second edge")
self.edge3 = ApplicationEdge(self.vert1, self.vert3, "Third edge")
self.verts = [self.vert1, self.vert2, self.vert3]
self.edges = [self.edge1, self.edge2, self.edge3]
self.graph = ApplicationGraph("Graph", self.verts, self.edges)
#######################################################################
# Setting up machine #
#######################################################################
flops = 1000
(_, _, n, _, _, s) = range(6)
processors = list()
for i in range(18):
processors.append(Processor(i, flops))
_sdram = SDRAM(128 * (2**20))
ip = "192.168.240.253"
chips = list()
for x in range(10):
for y in range(10):
links = list()
links.append(Link(x, y, 0, (x + 1) % 10, y, n, n))
links.append(Link(x, y, 1, (x + 1) % 10, (y + 1) % 10, s, s))
links.append(Link(x, y, 2, x, (y + 1) % 10, n, n))
links.append(Link(x, y, 3, (x - 1) % 10, y, s, s))
links.append(Link(x, y, 4, (x - 1) % 10, (y - 1) % 10, n, n))
links.append(Link(x, y, 5, x, (y - 1) % 10, s, s))
r = Router(links, False, 100, 1024)
chips.append(Chip(x, y, processors, r, _sdram, 0, 0, ip))
self.machine = Machine(chips)
#######################################################################
# Setting up graph and graph_mapper #
#######################################################################
self.vertices = list()
self.vertex1 = SimpleMachineVertex(
0, 1, self.vert1.get_resources_used_by_atoms(Slice(0, 1)),
"First vertex")
self.vertex2 = SimpleMachineVertex(
1, 5, get_resources_used_by_atoms(1, 5, []), "Second vertex")
self.vertex3 = SimpleMachineVertex(
5, 10, get_resources_used_by_atoms(5, 10, []), "Third vertex")
self.vertex4 = SimpleMachineVertex(
10, 100, get_resources_used_by_atoms(10, 100, []), "Fourth vertex")
self.vertices.append(self.vertex1)
self.vertices.append(self.vertex2)
self.vertices.append(self.vertex3)
self.vertices.append(self.vertex4)
self.edges = list()
self.graph = MachineGraph(self.vertices, self.edges)
self.graph_mapper = GraphMapper()
self.graph_mapper.add_vertices(self.vertices)
