class T(Hardware):
def __init__(self, data):
self.ram = RAM(data)
def main(self, addr):
read = self.ram.delayed_read(addr)
self.ram.delayed_write(addr, read + 1)
return read
class T(Hardware):
def __init__(self, data):
self.ram = RAM(data)
def main(self, addr, write_val):
self.ram.delayed_write(addr, write_val)
r = self.ram.delayed_read(addr)
return r
class T(Hardware):
def __init__(self, data):
self.ram = RAM(data)
def main(self, addr, write_val):
self.ram.delayed_write(addr, write_val)
if addr > 8:
return self.ram.delayed_read(addr)
else:
return -1
class T(Hardware):
def __init__(self, data):
self.ram = RAM(data)
self.read = 0
def main(self, addr, addr2):
self.ram.delayed_write(addr, addr2)
if addr > addr2:
self.read = self.ram.delayed_read(addr)
else:
self.read = self.ram.delayed_read(addr2)
return self.read
class T(Hardware):
def __init__(self, data1, data2):
self.ram1 = RAM(data1)
self.ram2 = RAM(data2)
def main(self, addr, write_val):
self.ram1.delayed_write(addr, write_val)
r1 = self.ram1.delayed_read(addr)
self.ram2.delayed_write(addr, write_val)
r2 = self.ram2.delayed_read(addr)
return r1, r2
def __init__(self, data):
self.ram = RAM(data)
def __init__(self, data):
self.signal = RAM(data)
def __init__(self, data1, data2):
self.ram = [RAM(data1), RAM(data2)]
def __init__(self, data1):
self.ram1 = RAM(data1)
def __init__(self, data1, data2):
self.ram1 = RAM(data1)
self.ram2 = RAM(data2)