Esempio n. 1
0
 def Initialize(self):
     # Initialize instruments:
     # PSGA
     self.saga = PSGA.Initiate()
     PSGA.rfoutput(self.saga, action=['Set', 1])
     PSGA.frequency(self.saga, action=['Set', "5.5" + "GHz"])
     PSGA.power(self.saga, action=['Set', "12" + "dBm"])
     # SA
     self.mxa = MXA.Initiate()
     MXA.frequency(self.mxa, action=['Set', '5.525GHz'])
     MXA.fspan(self.mxa, action=['Set', '150MHz'])
     MXA.rbw(self.mxa, action=['Set', '1MHz'])
     MXA.vbw(self.mxa, action=['Set', '100kHz'])
     MXA.trigger_source(self.mxa, action=['Set', 'EXTernal1'])
     # AWG
     self.awgsess = AWG.InitWithOptions()
     AWG.Abort_Gen(self.awgsess)
     AWG.ref_clock_source(self.awgsess,
                          action=['Set',
                                  int(1)])  # External 10MHz clock-reference
     AWG.predistortion_enabled(self.awgsess, action=['Set', True])
     AWG.output_mode_adv(self.awgsess,
                         action=['Set', int(2)])  # Sequence output mode
     AWG.arb_sample_rate(self.awgsess, action=['Set',
                                               float(1250000000)
                                               ])  # maximum sampling rate
     AWG.active_marker(self.awgsess, action=['Set', '3'])  # master
     AWG.marker_delay(self.awgsess, action=['Set', float(0)])
     AWG.marker_pulse_width(self.awgsess, action=['Set', float(1e-7)])
     AWG.marker_source(self.awgsess, action=['Set', int(7)])
     samplingrate = AWG.arb_sample_rate(self.awgsess)[1]
     dt = 1e9 / samplingrate  # in ns
     # PRESET Output:
     for ch in range(2):
         channel = str(ch + 1)
         AWG.output_config(self.awgsess, RepCap=channel,
                           action=["Set", 0])  # Single-ended
         AWG.output_filter_bandwidth(self.awgsess,
                                     RepCap=channel,
                                     action=["Set", 0])
         AWG.arb_gain(self.awgsess, RepCap=channel, action=["Set", 0.5])
         AWG.output_impedance(self.awgsess,
                              RepCap=channel,
                              action=["Set", 50])
     # output settings:
     for ch in range(2):
         channel = str(ch + 1)
         AWG.output_enabled(self.awgsess,
                            RepCap=channel,
                            action=["Set", int(1)])  # ON
         AWG.output_filter_enabled(self.awgsess,
                                   RepCap=channel,
                                   action=["Set", True])
         AWG.output_config(self.awgsess,
                           RepCap=channel,
                           action=["Set", int(2)])  # Amplified 1:2
         AWG.output_filter_bandwidth(self.awgsess,
                                     RepCap=channel,
                                     action=["Set", 0])
         AWG.arb_gain(self.awgsess, RepCap=channel, action=["Set", 0.5])
         AWG.output_impedance(self.awgsess,
                              RepCap=channel,
                              action=["Set", 50])
from pyqum.instrument.modular import AWG
from pyqum.instrument.logger import status_code
from pyqum.instrument.analyzer import curve
from numpy import sin, cos, pi, array, float64, sum, dot

# Initialize instruments:
# PSGA
saga = PSGA.Initiate()
PSGA.rfoutput(saga, action=['Set', 1])
PSGA.frequency(saga, action=['Set', "5.5" + "GHz"])
PSGA.power(saga, action=['Set', "12" + "dBm"])
# SA
mxa = MXA.Initiate()
MXA.frequency(mxa, action=['Set', '5.525GHz'])
MXA.fspan(mxa, action=['Set', '150MHz'])
MXA.rbw(mxa, action=['Set', '1MHz'])
MXA.vbw(mxa, action=['Set', '100kHz'])
MXA.trigger_source(mxa, action=['Set', 'EXTernal1'])
# AWG
awgsess = AWG.InitWithOptions()
AWG.Abort_Gen(awgsess)
AWG.ref_clock_source(awgsess,
                     action=['Set', int(1)])  # External 10MHz clock-reference
AWG.predistortion_enabled(awgsess, action=['Set', True])
AWG.output_mode_adv(awgsess, action=['Set', int(2)])  # Sequence output mode
AWG.arb_sample_rate(awgsess,
                    action=['Set', float(1250000000)])  # maximum sampling rate
AWG.active_marker(awgsess, action=['Set', '3'])  # master
AWG.marker_delay(awgsess, action=['Set', float(0)])
AWG.marker_pulse_width(awgsess, action=['Set', float(1e-7)])
AWG.marker_source(awgsess, action=['Set', int(7)])
Esempio n. 3
0
    def __init__(self, LO_freq, LO_powa, IF_freq):
        '''
        Initialize relevant instruments:
        LO_freq: LO frequency in GHz
        LO_powa: LO power in dBm
        IF_freq: IF frequency in GHz
        '''

        self.LO_freq, self.LO_powa, self.IF_freq = LO_freq, LO_powa, IF_freq

        # SA
        self.mxa = MXA.Initiate()
        MXA.frequency(self.mxa, action=['Set', '%sGHz' % (LO_freq + IF_freq)])
        MXA.fspan(self.mxa, action=['Set', '150MHz'])
        MXA.rbw(self.mxa, action=['Set', '1MHz'])
        MXA.vbw(self.mxa, action=['Set', '100kHz'])
        MXA.trigger_source(self.mxa, action=['Set', 'EXTernal1'])
        # PSGA
        self.saga = PSGA.Initiate()
        PSGA.rfoutput(self.saga, action=['Set', 1])
        PSGA.frequency(self.saga, action=['Set', "%sGHz" % LO_freq])
        PSGA.power(self.saga, action=['Set', "%sdBm" % LO_powa])
        # AWG
        self.awgsess = AWG.InitWithOptions()
        AWG.Abort_Gen(self.awgsess)
        AWG.ref_clock_source(self.awgsess,
                             action=['Set',
                                     int(1)])  # External 10MHz clock-reference
        AWG.predistortion_enabled(self.awgsess, action=['Set', True])
        AWG.output_mode_adv(self.awgsess,
                            action=['Set', int(2)])  # Sequence output mode
        AWG.arb_sample_rate(self.awgsess, action=['Set',
                                                  float(1250000000)
                                                  ])  # maximum sampling rate
        AWG.active_marker(self.awgsess, action=['Set', '3'])  # master
        AWG.marker_delay(self.awgsess, action=['Set', float(0)])
        AWG.marker_pulse_width(self.awgsess, action=['Set', float(1e-7)])
        AWG.marker_source(self.awgsess, action=['Set', int(7)])
        # PRESET Output:
        for ch in range(2):
            channel = str(ch + 1)
            AWG.output_config(self.awgsess, RepCap=channel,
                              action=["Set", 0])  # Single-ended
            AWG.output_filter_bandwidth(self.awgsess,
                                        RepCap=channel,
                                        action=["Set", 0])
            AWG.arb_gain(self.awgsess, RepCap=channel, action=["Set", 0.5])
            AWG.output_impedance(self.awgsess,
                                 RepCap=channel,
                                 action=["Set", 50])
        # output settings:
        for ch in range(2):
            channel = str(ch + 1)
            AWG.output_enabled(self.awgsess,
                               RepCap=channel,
                               action=["Set", int(1)])  # ON
            AWG.output_filter_enabled(self.awgsess,
                                      RepCap=channel,
                                      action=["Set", True])
            AWG.output_config(self.awgsess,
                              RepCap=channel,
                              action=["Set", int(2)])  # Amplified 1:2
            AWG.output_filter_bandwidth(self.awgsess,
                                        RepCap=channel,
                                        action=["Set", 0])
            AWG.arb_gain(self.awgsess, RepCap=channel, action=["Set", 0.5])
            AWG.output_impedance(self.awgsess,
                                 RepCap=channel,
                                 action=["Set", 50])