def test_save_and_load(self):
import pysthal
from pyhalco_common import Enum
import pyhalco_hicann_v2 as Coordinate
from pyhalbe import HICANN
wafer = pysthal.Wafer(Coordinate.Wafer(3))
hicann1 = wafer[Coordinate.HICANNOnWafer(Enum(30))]
for row in Coordinate.iter_all(Coordinate.SynapseRowOnHICANN):
d_pattern = numpy.random.randint(0, 16, 256)
d_pattern[d_pattern[0] + 23] = 15
hicann1.synapses[row].decoders[:] = [
HICANN.SynapseDecoder(int(ii)) for ii in d_pattern
]
w_pattern = numpy.random.randint(0, 16, 256)
w_pattern[w_pattern[0] + 23] = 15
hicann1.synapses[row].weights[:] = [
HICANN.SynapseWeight(int(ii)) for ii in w_pattern
]
wafer2 = pysthal.Wafer(Coordinate.Wafer(0))
hicann2 = wafer2[Coordinate.HICANNOnWafer(Enum(42))]
self.assertNotEqual(str(wafer.status()), str(wafer2.status()))
for row in Coordinate.iter_all(Coordinate.SynapseRowOnHICANN):
d1 = hicann1.synapses[row].decoders
d2 = hicann2.synapses[row].decoders
self.assertNotEqual(d1, d2)
w1 = hicann1.synapses[row].weights
w2 = hicann2.synapses[row].weights
self.assertNotEqual(w1, w2)
with tempfile.NamedTemporaryFile() as f:
wafer.dump(f.name, True)
wafer2.load(f.name)
self.assertEqual(wafer.size(), wafer2.size())
hicann1 = wafer[Coordinate.HICANNOnWafer(Enum(30))]
hicann2 = wafer2[Coordinate.HICANNOnWafer(Enum(30))]
self.assertEqual(hicann1.index(), hicann2.index())
self.assertEqual(str(wafer.status()), str(wafer2.status()))
for row in Coordinate.iter_all(Coordinate.SynapseRowOnHICANN):
d1 = hicann1.synapses[row].decoders
d2 = hicann2.synapses[row].decoders
self.assertEqual(d1, d2)
w1 = hicann1.synapses[row].weights
w2 = hicann2.synapses[row].weights
self.assertEqual(w1, w2)
def test_numpy_policies(self):
import numpy
import pysthal
import pyhalco_hicann_v2
from pyhalbe import HICANN
w = pysthal.Wafer(pyhalco_hicann_v2.Wafer())
h = w[pyhalco_hicann_v2.HICANNOnWafer()]
addrs = numpy.array(numpy.random.randint(64, size=100),
dtype=numpy.ushort)
times = numpy.cumsum(numpy.random.poisson(10.0, size=100)) * 1.e-6
in_spikes = pysthal.Vector_Spike()
for addr, t in zip(addrs, times):
in_spikes.append(pysthal.Spike(HICANN.L1Address(addr), t))
link = pyhalco_hicann_v2.GbitLinkOnHICANN(3)
h.sendSpikes(link, in_spikes)
h.sortSpikes()
x = h.sentSpikes(link)
times_t, addrs_t = x.T
numpy.testing.assert_allclose(times,
times_t,
rtol=0.0,
atol=1.0 / 250e6)
numpy.testing.assert_array_equal(
addrs, numpy.array(addrs_t, dtype=numpy.ushort))
def setUp(self):
"""
Set up the unit test:
A full reticle is allocated and complelty configured with zeroed
floating gates.
"""
if None in (self.WAFER, self.DNC):
raise unittest.SkipTest("No DNC selected, skipping hardware test")
return
self.data_adcs = {}
# Dump data in case of an error in setup
self.save_data()
self.wafer = pysthal.Wafer(self.WAFER)
self.reset_hicann_config()
db = pysthal.MagicHardwareDatabase()
self.wafer.connect(db)
for hicann_c in self.hicanns:
hicann = self.wafer[hicann_c]
for analog in Coordinate.iter_all(Coordinate.AnalogOnHICANN):
key = self.adc_key(hicann_c, analog)
try:
cfg = hicann.getADCConfig(analog)
self.data_adcs[key] = (cfg.coord.value(),
cfg.channel.value(), [])
except RuntimeError:
self.data_adcs[key] = (None, None, [])
self.wafer.configure(pysthal.ParallelHICANNv4Configurator())
def test_wafer_dumpnload(self):
import tempfile
wafer_c = C.Wafer(33)
w = pysthal.Wafer(wafer_c)
h_c = C.HICANNOnWafer(Enum(297))
h = w[h_c]
with tempfile.NamedTemporaryFile() as f:
w.dump(f.name, True)
w2 = pysthal.Wafer(wafer_c)
w2.load(f.name)
self.assertEqual(w, w2)
h2 = w2[h_c]
self.assertTrue(h2.has_wafer())
# change something to ensure that it's not a mere pointer copy
h.set_neuron_size(2)
self.assertNotEqual(w, w2)
def test_has_outbound_mergers(self):
import pyhalbe
import pysthal
from pyhalco_common import Enum
import pyhalco_hicann_v2 as C
wafer_c = C.Wafer(33)
gbitlink_c = C.GbitLinkOnHICANN(Enum(0))
fpga_on_wafer_c = C.FPGAOnWafer(Enum(0))
fpga_c = C.FPGAGlobal(fpga_on_wafer_c, wafer_c)
hicann_cs = [
C.HICANNGlobal(h, wafer_c) for h in fpga_c.toHICANNOnWafer()
]
hicann_c = hicann_cs[0]
hicann_on_dnc_c = hicann_c.toHICANNOnWafer().toHICANNOnDNC()
dnc_on_fpga_c = hicann_c.toDNCOnFPGA()
w = pysthal.Wafer()
h = w[hicann_c.toHICANNOnWafer()]
f = w[fpga_on_wafer_c]
self.assertFalse(f.hasOutboundMergers())
f[dnc_on_fpga_c][hicann_on_dnc_c].layer1[
gbitlink_c] = pyhalbe.HICANN.GbitLink.Direction.TO_DNC
self.assertTrue(f.hasOutboundMergers())
def test_dnc_copy(self):
import copy
wafer_c = C.Wafer(33)
w = pysthal.Wafer(wafer_c)
h_c = C.HICANNGlobal(C.HICANNOnWafer(Enum(297)), wafer_c)
h = w[h_c.toHICANNOnWafer()]
d = w[h_c.toFPGAOnWafer()][h_c.toDNCOnFPGA()]
d2 = copy.deepcopy(d)
self.assertEqual(d, d2)
# change something to ensure that it's not a mere pointer copy
h2 = w[C.HICANNOnWafer(Enum(298))]
self.assertNotEqual(d, d2)
def load_hicann_cfg(wafer_cfg, h):
"""
load HICANN config from file
params:
wafer_cfg - filename of dumped wafer config (cf. PyMarocco.wafer_cfg)
h - HICANNOnWafer coordinate
"""
assert isinstance(h, Coord.HICANNOnWafer)
w = pysthal.Wafer()
w.load(wafer_cfg)
return w[h]
def test_configure(self):
route = L1Route()
hicann = HICANNOnWafer(X(6), Y(5))
route.append(hicann, HLineOnHICANN(48))
route.append(VLineOnHICANN(39))
wafer = pysthal.Wafer()
pyalone.configure(wafer, route)
self.assertEqual(1, len(wafer.getAllocatedHicannCoordinates()))
reference = pysthal.HICANN()
reference.crossbar_switches.set(VLineOnHICANN(39), HLineOnHICANN(48),
True)
self.assertEqual(reference, wafer[hicann])
def test_dnc_pickle(self):
import pickle
wafer_c = C.Wafer(33)
w = pysthal.Wafer(wafer_c)
h_c = C.HICANNGlobal(C.HICANNOnWafer(Enum(297)), wafer_c)
h = w[h_c.toHICANNOnWafer()]
d = w[h_c.toFPGAOnWafer()][h_c.toDNCOnFPGA()]
d_str = pickle.dumps(d)
d2 = pickle.loads(d_str)
self.assertEqual(d, d2)
# change something to ensure that it's not a mere pointer copy
h2 = w[C.HICANNOnWafer(Enum(298))]
self.assertNotEqual(d, d2)
def test_wafer_copy(self):
import copy
wafer_c = C.Wafer(33)
w = pysthal.Wafer(wafer_c)
h_c = C.HICANNOnWafer(Enum(297))
h = w[h_c]
self.assertTrue(h.has_wafer())
w2 = copy.deepcopy(w)
self.assertEqual(w, w2)
h2 = w2[h_c]
self.assertTrue(h2.has_wafer())
# change something to ensure that it's not a mere pointer copy
h.set_neuron_size(2)
self.assertNotEqual(w, w2)
def test_wafer_pickle(self):
import pickle
wafer_c = C.Wafer(33)
w = pysthal.Wafer(wafer_c)
h_c = C.HICANNOnWafer(Enum(297))
h = w[h_c]
self.assertTrue(h.has_wafer())
w_str = pickle.dumps(w)
w2 = pickle.loads(w_str)
self.assertEqual(w, w2)
h2 = w2[h_c]
self.assertTrue(h2.has_wafer())
# change something to ensure that it's not a mere pointer copy
h.set_neuron_size(2)
self.assertNotEqual(w, w2)
def setUp(self):
super(TestMultiHICANN, self).setUp()
pylogging.set_loglevel(pylogging.get("Default"), pylogging.LogLevel.ERROR)
pylogging.set_loglevel(pylogging.get("sthal"), pylogging.LogLevel.INFO)
if None in (self.WAFER, self.HICANN):
return
self.wafer_c = Coord.Wafer(self.WAFER)
self.w = pysthal.Wafer(self.wafer_c)
self.h1 = self.w[Coord.HICANNOnWafer(Enum(324))]
self.h2 = self.w[Coord.HICANNOnWafer(Enum(120))]
self.addCleanup(self.w.disconnect)
def test_common_FPGA_config(self):
import pysthal
import pyhalco_hicann_v2
w = pysthal.Wafer(pyhalco_hicann_v2.Wafer())
s1 = w.commonFPGASettings()
s2 = w.commonFPGASettings()
s1.setPLL(200.0e6)
self.assertEqual(s1.getPLL(), s2.getPLL())
s3 = w.commonFPGASettings()
self.assertEqual(s1.getPLL(), s3.getPLL())
for pll in (100.0e6, 150.0e6, 200.0e6, 250.0e6):
s1.setPLL(pll)
for pll in (53.0e6, 32.0e6, 430.e6, 170.e6):
self.assertRaises(ValueError, s1.setPLL, pll)
def test_spike_input(self):
self.marocco.wafer_cfg = os.path.join(self.temporary_directory,
"wafer_cfg.bin")
pynn.setup(marocco=self.marocco)
target = pynn.Population(1, pynn.IF_cond_exp, {})
params = [[1., 2., 3.], [4., 3., 2.]]
sources = [
pynn.Population(1, pynn.SpikeSourceArray, {'spike_times': times})
for times in params
]
for source in sources:
pynn.Projection(source, target,
pynn.AllToAllConnector(weights=0.004))
pynn.run(1000.)
results = self.load_results()
self.assertEqual(0, len(results.spike_times.get(target[0])))
for spike_times, pop in zip(params, sources):
self.assertSequenceEqual(spike_times,
results.spike_times.get(pop[0]))
spike_times.append(5.)
results.spike_times.add(pop[0], 5.)
self.assertSequenceEqual(spike_times, results.spike_times.get(pop[0]))
spike_times.extend([6., 7.])
results.spike_times.add(pop[0], [6., 7.])
self.assertSequenceEqual(spike_times, results.spike_times.get(pop[0]))
spike_times = [42., 123.]
results.spike_times.set(pop[0], spike_times)
self.assertSequenceEqual(spike_times, results.spike_times.get(pop[0]))
params[-1][:] = []
results.spike_times.clear(pop[0])
self.assertEqual(0, len(results.spike_times.get(pop[0])))
# Check that modifications are reflected in sthal config container
results.save(self.marocco.persist, overwrite=True)
self.marocco.skip_mapping = True
pynn.run(1000.)
import pysthal
wafer_cfg = pysthal.Wafer()
wafer_cfg.load(self.marocco.wafer_cfg)
for spike_times, pop in zip(params, sources):
item, = results.placement.find(pop[0])
address = item.address()
l1_address = address.toL1Address()
hicann_cfg = wafer_cfg[address.toHICANNOnWafer()]
hicann_cfg.sortSpikes()
raw_spikes = hicann_cfg.sentSpikes(
C.GbitLinkOnHICANN(address.toDNCMergerOnHICANN()))
raw_spikes = raw_spikes[raw_spikes[:, 1] == l1_address.value(), 0]
self.assertEqual(len(spike_times), len(raw_spikes))
pynn.end()
def setUp(self):
"""Create HICANN object"""
c_hicann = Coordinate.HICANNOnWafer(Enum(0))
wafer = pysthal.Wafer()
self.hicann = wafer[c_hicann]
self.options = [pysthal.NORMAL, pysthal.FAST, pysthal.SLOW]
def run_mapping(calib_dir, output_dir, wafer, hicann, skip_neurons, params):
"""
:type hicann: HICANNOnWafer
:param params: dictionary containing neuron parameters
:param skip_neurons: number of non-functional dummy neurons to insert
"""
from pymarocco import PyMarocco
from pymarocco.results import Marocco
from pymarocco.coordinates import BioNeuron
import pyhmf as pynn
import pysthal
logger = setup_logger()
marocco = PyMarocco()
marocco.neuron_placement.default_neuron_size(
utils.get_nested(params, "neuron.size", default=4))
marocco.neuron_placement.restrict_rightmost_neuron_blocks(True)
marocco.neuron_placement.minimize_number_of_sending_repeaters(False)
marocco.backend = PyMarocco.None
marocco.calib_backend = PyMarocco.XML
marocco.calib_path = calib_dir
marocco.param_trafo.use_big_capacitors = False
marocco.persist = os.path.join(output_dir, "marocco.xml.gz")
marocco.wafer_cfg = os.path.join(output_dir, "wafer_cfg.bin")
marocco.default_wafer = wafer
# FIXME: remove?
marocco.param_trafo.alpha_v = 1000.0
marocco.param_trafo.shift_v = 0.0
pynn.setup(marocco=marocco)
synaptic_input = {}
for input_type, input_params in params["synaptic_input"].iteritems():
if not utils.get_nested(input_params, "enabled", default=True):
logger.info(
"skipping disabled {!r} synaptic input".format(input_type))
continue
spike_times = utils.get_nested(input_params,
"spike_times",
default=None)
if spike_times:
start = spike_times["start"]
stop = spike_times["stop"]
step = spike_times["step"]
spike_times = np.arange(start, stop, step)
input_pop_model = pynn.SpikeSourceArray
input_pop_params = {"spike_times": spike_times}
else:
raise NotImplementedError(
"unknown config for {!r} synaptic input".format(input_type))
logger.info(
("{!r} synaptic input will come from "
"{} with parameters {!r}").format(input_type,
input_pop_model.__name__,
input_pop_params))
synaptic_input[input_type] = pynn.Population(1, input_pop_model,
input_pop_params)
neuron_params = utils.get_nested(params, "neuron.parameters")
neuron_model = getattr(
pynn, utils.get_nested(params, "neuron.model", default="IF_cond_exp"))
logger.info("target population is {} neuron with parameters {!r}".format(
neuron_model.__name__, neuron_params))
# Force marocco to give us a different neuron by inserting
# `Neuron_Number - 1` dummy neurons.
populations = []
for ii in range(0, skip_neurons + 1):
populations.append(pynn.Population(1, neuron_model, neuron_params))
marocco.manual_placement.on_hicann(populations[-1], hicann)
target_pop = populations[-1]
for input_type, input_pop in synaptic_input.iteritems():
multiplicity = utils.get_nested(params,
"synaptic_input",
input_type,
"multiplicity",
default=1)
assert multiplicity >= 1
weight = utils.get_nested(params, "synaptic_input", input_type,
"weight")
con = pynn.AllToAllConnector(weights=weight)
logger.info(("connecting {!r} synaptic input "
"to target population with weight {} "
"via {} projections").format(input_type, weight,
multiplicity))
for _ in xrange(multiplicity):
pynn.Projection(input_pop, target_pop, con, target=input_type)
pynn.run(params["duration"])
pynn.end()
wafer_cfg = pysthal.Wafer()
wafer_cfg.load(marocco.wafer_cfg)
results = Marocco.from_file(marocco.persist)
return (BioNeuron(target_pop[0]), results, wafer_cfg)
pynn.Projection(spikes_e, pop, con_alltoall_e, target="excitatory")
pynn.Projection(spikes_e, pop, con_alltoall_e, target="excitatory")
pynn.Projection(spikes_e, pop, con_alltoall_e, target="excitatory")
pynn.Projection(spikes_i, pop, con_alltoall_i, target="inhibitory")
pynn.Projection(spikes_i, pop, con_alltoall_i, target="inhibitory")
pynn.Projection(spikes_i, pop, con_alltoall_i, target="inhibitory")
pynn.run(duration_ms)
pynn.end()
mapping_stats = marocco.getStats()
# load wafer config created by PyNN
w = pysthal.Wafer()
w.load(marocco.wafer_cfg)
h = w[used_hicann]
def get_denmems_for_pynn_nrn_with_pop(pop, nrn_index_in_pop):
"""
Return used denmems of pop[nrn_index_in_pop]
"""
bio_id = pymarocco.bio_id()
if type(pop) is pynn.Population:
bio_id.pop = pop.euter_id()
# population-relative neuron idx
bio_id.neuron = nrn_index_in_pop
elif type(pop) is pynn.PopulationView:
action='store_true',
dest='zero_syn',
help="set synapse values to zero")
parser.add_argument('-z',
'--zero-floating-gate',
action='store_true',
dest='zero_fg',
help="set floating gate values to zero")
args = parser.parse_args()
wafer_c = C.Wafer(args.wafer)
hicann_c = C.HICANNOnWafer(Enum(args.hicann))
fpga_c = hicann_c.toFPGAOnWafer()
dnc_c = fpga_c.toDNCOnWafer()
wafer = pysthal.Wafer(wafer_c)
wafer.drop_defects()
fpga = wafer[fpga_c]
pll_frequency = args.pll * 1e6
fpga.commonFPGASettings().setPLL(pll_frequency)
fpga.commonFPGASettings().setSynapseArrayReset(args.zero_syn)
hicann = wafer[hicann_c]
if args.zero_fg:
set_floating_gate_to_zero(hicann)
# blacklist all but the HICANN under test
for h in C.iter_all(C.HICANNOnDNC):
if h.toHICANNOnWafer(fpga_c) != hicann_c:
fpga.setBlacklisted(h, True)