def test_raises_wider_circuit(self):
"""Test error is raised if the circuit is wider than coupling map."""
qr0 = QuantumRegister(3, "q0")
qr1 = QuantumRegister(3, "q1")
circuit = QuantumCircuit(qr0, qr1)
circuit.cx(qr0, qr1)
dag = circuit_to_dag(circuit)
with self.assertRaises(TranspilerError):
pass_ = TrivialLayout(CouplingMap(self.cmap5))
pass_.run(dag)
def test_3q_circuit_5q_coupling(self):
"""Test finds trivial layout for 3q circuit on 5q device."""
qr = QuantumRegister(3, "q")
circuit = QuantumCircuit(qr)
circuit.cx(qr[1], qr[0])
circuit.cx(qr[0], qr[2])
circuit.cx(qr[1], qr[2])
dag = circuit_to_dag(circuit)
pass_ = TrivialLayout(CouplingMap(self.cmap5))
pass_.run(dag)
layout = pass_.property_set["layout"]
for i in range(3):
self.assertEqual(layout[qr[i]], i)
def test_two_qubit_pulse_optimal_none_no_raise(self):
"""Verify pulse optimal decomposition when pulse_optimize==None doesn't
raise when pulse optimal decomposition unknown."""
# this assumes iswawp pulse optimal decomposition doesn't exist
backend = FakeVigo()
conf = backend.configuration()
conf.basis_gates = [gate if gate != "cx" else "iswap" for gate in conf.basis_gates]
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=None,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
try:
qc_out = pm.run(qc)
except QiskitError:
self.fail("pulse_optimize=None raised exception unexpectedly")
if isinstance(qc_out, QuantumCircuit):
num_ops = qc_out.count_ops()
else:
num_ops = qc_out[0].count_ops()
self.assertIn("sx", num_ops)
self.assertLessEqual(num_ops["sx"], 14)
def default_pass_manager(transpile_config):
"""
The default pass manager that maps to the coupling map.
Args:
transpile_config (TranspileConfig)
Returns:
PassManager: A pass manager to map and optimize.
"""
basis_gates = transpile_config.basis_gates
coupling_map = transpile_config.coupling_map
initial_layout = transpile_config.initial_layout
seed_transpiler = transpile_config.seed_transpiler
pass_manager = PassManager()
pass_manager.append(SetLayout(initial_layout))
pass_manager.append(Unroller(basis_gates))
# Use the trivial layout if no layout is found
pass_manager.append(
TrivialLayout(coupling_map),
condition=lambda property_set: not property_set['layout'])
# if the circuit and layout already satisfy the coupling_constraints, use that layout
# otherwise layout on the most densely connected physical qubit subset
pass_manager.append(CheckMap(coupling_map))
pass_manager.append(
DenseLayout(coupling_map),
condition=lambda property_set: not property_set['is_swap_mapped'])
# Extend the the dag/layout with ancillas using the full coupling map
pass_manager.append(FullAncillaAllocation(coupling_map))
pass_manager.append(EnlargeWithAncilla())
# Circuit must only contain 1- or 2-qubit interactions for swapper to work
pass_manager.append(Unroll3qOrMore())
# Swap mapper
pass_manager.append(BarrierBeforeFinalMeasurements())
pass_manager.append(
LegacySwap(coupling_map, trials=20, seed=seed_transpiler))
# Expand swaps
pass_manager.append(Decompose(SwapGate))
# Change CX directions
pass_manager.append(CXDirection(coupling_map))
# Simplify single qubit gates and CXs
simplification_passes = [
Optimize1qGates(),
CXCancellation(),
RemoveResetInZeroState()
]
pass_manager.append(
simplification_passes + [Depth(), FixedPoint('depth')],
do_while=lambda property_set: not property_set['depth_fixed_point'])
return pass_manager
def test_two_qubit_pulse_optimal_none_optimal(self):
"""Verify pulse optimal decomposition when pulse_optimize==None."""
# this assumes iswawp pulse optimal decomposition doesn't exist
backend = FakeVigo()
conf = backend.configuration()
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=None,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
qc_out = pm.run(qc)
if isinstance(qc_out, QuantumCircuit):
num_ops = qc_out.count_ops() # pylint: disable=no-member
else:
num_ops = qc_out[0].count_ops()
self.assertIn("sx", num_ops)
self.assertLessEqual(num_ops["sx"], 12)
def test_two_qubit_natural_direction_true_duration_fallback(self):
"""Verify not attempting pulse optimal decomposition when pulse_optimize==False."""
# this assumes iswawp pulse optimal decomposition doesn't exist
backend = FakeVigo()
conf = backend.configuration()
# conf.basis_gates = [gate if gate != "cx" else "iswap" for gate in conf.basis_gates]
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 0], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
qc_out = pm.run(qc)
self.assertTrue(
all(
# pylint: disable=no-member
([qr[0], qr[1]] == qlist
for _, qlist, _ in qc_out.get_instructions("cx"))))
def test_two_qubit_synthesis_to_directional_cx_from_gate_errors(self):
"""Verify two qubit unitaries are synthesized to match basis gates."""
# TODO: should make check more explicit e.g. explicitly set gate
# direction in test instead of using specific fake backend
backend = FakeVigo()
conf = backend.configuration()
qr = QuantumRegister(2)
coupling_map = CouplingMap(conf.coupling_map)
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=None,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=False,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
qc_out = pm.run(qc)
unisynth_pass_nat = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=None,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=True,
)
pm_nat = PassManager([triv_layout_pass, unisynth_pass_nat])
qc_out_nat = pm_nat.run(qc)
self.assertEqual(Operator(qc), Operator(qc_out))
self.assertEqual(Operator(qc), Operator(qc_out_nat))
def test_9q_circuit_16q_coupling(self):
"""Test finds trivial layout for 9q circuit with 2 registers on 16q device."""
qr0 = QuantumRegister(4, "q0")
qr1 = QuantumRegister(5, "q1")
cr = ClassicalRegister(2, "c")
circuit = QuantumCircuit(qr0, qr1, cr)
circuit.cx(qr0[1], qr0[2])
circuit.cx(qr0[0], qr1[3])
circuit.cx(qr1[4], qr0[2])
circuit.measure(qr1[1], cr[0])
circuit.measure(qr0[2], cr[1])
dag = circuit_to_dag(circuit)
pass_ = TrivialLayout(CouplingMap(self.cmap16))
pass_.run(dag)
layout = pass_.property_set["layout"]
for i in range(4):
self.assertEqual(layout[qr0[i]], i)
for i in range(5):
self.assertEqual(layout[qr1[i]], i + 4)
def test_classical_condition(self):
"""Test that :class:`.SabreSwap` correctly accounts for classical conditions in its
reckoning on whether a node is resolved or not. If it is not handled correctly, the second
gate might not appear in the output.
Regression test of gh-8040."""
with self.subTest("1 bit in register"):
qc = QuantumCircuit(2, 1)
qc.z(0)
qc.z(0).c_if(qc.cregs[0], 0)
cm = CouplingMap([(0, 1), (1, 0)])
expected = PassManager([TrivialLayout(cm)]).run(qc)
actual = PassManager([TrivialLayout(cm), SabreSwap(cm)]).run(qc)
self.assertEqual(expected, actual)
with self.subTest("multiple registers"):
cregs = [ClassicalRegister(3), ClassicalRegister(4)]
qc = QuantumCircuit(QuantumRegister(2, name="q"), *cregs)
qc.z(0)
qc.z(0).c_if(cregs[0], 0)
qc.z(0).c_if(cregs[1], 0)
cm = CouplingMap([(0, 1), (1, 0)])
expected = PassManager([TrivialLayout(cm)]).run(qc)
actual = PassManager([TrivialLayout(cm), SabreSwap(cm)]).run(qc)
self.assertEqual(expected, actual)
def test_two_qubit_synthesis_to_directional_cx_from_coupling_map_natural_false(self):
"""Verify natural cx direction is used when specified in coupling map
when natural_direction is None."""
# TODO: should make check more explicit e.g. explicitly set gate
# direction in test instead of using specific fake backend
backend = FakeVigo()
conf = backend.configuration()
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=False,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
qc_out = pm.run(qc)
unisynth_pass_nat = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=False,
)
pm_nat = PassManager([triv_layout_pass, unisynth_pass_nat])
qc_out_nat = pm_nat.run(qc)
# the decomposer defaults to the [1, 0] direction but the coupling
# map specifies a [0, 1] direction. Check that this is respected.
self.assertTrue(
all(
# pylint: disable=no-member
([qr[1], qr[0]] == qlist for _, qlist, _ in qc_out.get_instructions("cx"))
)
)
self.assertTrue(
all(
# pylint: disable=no-member
([qr[1], qr[0]] == qlist for _, qlist, _ in qc_out_nat.get_instructions("cx"))
)
)
self.assertEqual(Operator(qc), Operator(qc_out))
self.assertEqual(Operator(qc), Operator(qc_out_nat))
def setUp(self):
coupling = [[0, 1], [1, 2], [2, 3], [3, 4], [4, 5], [5, 6]]
coupling_map = CouplingMap(couplinglist=coupling)
basis_gates = ['u1', 'u3', 'u2', 'cx']
qr = QuantumRegister(7, 'q')
layout = Layout({qr[i]: i for i in range(coupling_map.size())})
# Create a pass manager with a variety of passes and flow control structures
self.pass_manager = PassManager()
self.pass_manager.append(SetLayout(layout))
self.pass_manager.append(TrivialLayout(coupling_map), condition=lambda x: True)
self.pass_manager.append(FullAncillaAllocation(coupling_map))
self.pass_manager.append(EnlargeWithAncilla())
self.pass_manager.append(Unroller(basis_gates))
self.pass_manager.append(CheckMap(coupling_map))
self.pass_manager.append(BarrierBeforeFinalMeasurements(), do_while=lambda x: False)
self.pass_manager.append(CXDirection(coupling_map))
self.pass_manager.append(RemoveResetInZeroState())
def test_two_qubit_pulse_optimal_true_raises(self):
"""Verify raises if pulse optimal==True but cx is not in the backend basis."""
backend = FakeVigo()
conf = backend.configuration()
# this assumes iswawp pulse optimal decomposition doesn't exist
conf.basis_gates = [gate if gate != "cx" else "iswap" for gate in conf.basis_gates]
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
coupling_map=coupling_map,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
with self.assertRaises(QiskitError):
pm.run(qc)
def test_two_qubit_natural_direction_true_gate_length_raises(self):
"""Verify not attempting pulse optimal decomposition when pulse_optimize==False."""
# this assumes iswawp pulse optimal decomposition doesn't exist
backend = FakeVigo()
conf = backend.configuration()
for _, nduv in backend.properties()._gates["cx"].items():
nduv["gate_length"] = (4e-7, nduv["gate_length"][1])
nduv["gate_error"] = (7e-3, nduv["gate_error"][1])
qr = QuantumRegister(2)
coupling_map = CouplingMap([[0, 1], [1, 0], [1, 2], [1, 3], [3, 4]])
triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
basis_gates=conf.basis_gates,
backend_props=backend.properties(),
pulse_optimize=True,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
with self.assertRaises(TranspilerError):
pm.run(qc)
def level_2_pass_manager(pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 2 pass manager: medium optimization by initial layout selection and
gate cancellation using commutativity rules.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, qubits are laid out on the most densely connected subset
which also exhibits the best gate fidelitites.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation and redundant
reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 2 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
translation_method = pass_manager_config.translation_method or 'translator'
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Search for a perfect layout, or choose a dense layout, if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout_1 = CSPLayout(coupling_map, call_limit=1000, time_limit=10)
if layout_method == 'trivial':
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == 'sabre':
_choose_layout_2 = SabreLayout(coupling_map, max_iterations=2, seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 2. Extend dag/layout with ancillas using the full coupling map
_embed = [FullAncillaAllocation(coupling_map), EnlargeWithAncilla(), ApplyLayout()]
# 3. Unroll to 1q or 2q gates
_unroll3q = Unroll3qOrMore()
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=5)]
elif routing_method == 'sabre':
_swap += [SabreSwap(coupling_map, heuristic='decay', seed=seed_transpiler)]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == 'unroller':
_unroll = [Unroller(basis_gates)]
elif translation_method == 'translator':
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates)]
elif translation_method == 'synthesis':
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
]
else:
raise TranspilerError("Invalid translation method %s." % translation_method)
# 6. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 7. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 8. 1q rotation merge and commutative cancellation iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGates(basis_gates), CommutativeCancellation()]
# 9. Schedule the circuit only when scheduling_method is supplied
if scheduling_method:
_scheduling = [TimeUnitAnalysis(instruction_durations)]
if scheduling_method in {'alap', 'as_late_as_possible'}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {'asap', 'as_soon_as_possible'}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." % scheduling_method)
# Build pass manager
pm2 = PassManager()
if coupling_map:
pm2.append(_given_layout)
pm2.append(_choose_layout_1, condition=_choose_layout_condition)
pm2.append(_choose_layout_2, condition=_choose_layout_condition)
pm2.append(_embed)
pm2.append(_unroll3q)
pm2.append(_swap_check)
pm2.append(_swap, condition=_swap_condition)
pm2.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm2.append(_direction_check)
pm2.append(_direction, condition=_direction_condition)
pm2.append(_reset)
pm2.append(_depth_check + _opt, do_while=_opt_control)
if scheduling_method:
pm2.append(_scheduling)
return pm2
def level_3_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and
gate cancellation using commutativity rules and unitary synthesis.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, and device calibration information is available, the
circuit is mapped to the qubits with best readouts and to CX gates with highest fidelity.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation, resynthesis
of two-qubit unitary blocks, and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 3 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
translation_method = pass_manager_config.translation_method or 'translator'
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Unroll to 1q or 2q gates
_unroll3q = Unroll3qOrMore()
# 2. Layout on good qubits if calibration info available, otherwise on dense links
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout_1 = [] if pass_manager_config.layout_method \
else CSPLayout(coupling_map, call_limit=10000, time_limit=60, seed=seed_transpiler)
if layout_method == 'trivial':
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == 'sabre':
_choose_layout_2 = SabreLayout(coupling_map,
max_iterations=4,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=200, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=6)]
elif routing_method == 'sabre':
_swap += [
SabreSwap(coupling_map, heuristic='decay', seed=seed_transpiler)
]
elif routing_method == 'none':
_swap += [
Error(
msg=
'No routing method selected, but circuit is not routed to device. '
'CheckMap Error: {check_map_msg}',
action='raise')
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == 'unroller':
_unroll = [Unroller(basis_gates)]
elif translation_method == 'translator':
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates)
]
elif translation_method == 'synthesis':
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 6. Fix any CX direction mismatch
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 8. Optimize iteratively until no more change in depth. Removes useless gates
# after reset and before measure, commutes gates and optimizes contiguous blocks.
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_reset = [RemoveResetInZeroState()]
_meas = [OptimizeSwapBeforeMeasure(), RemoveDiagonalGatesBeforeMeasure()]
_opt = [
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
Optimize1qGatesDecomposition(basis_gates),
CommutativeCancellation(),
]
# Schedule the circuit only when scheduling_method is supplied
if scheduling_method:
_scheduling = [TimeUnitAnalysis(instruction_durations)]
if scheduling_method in {'alap', 'as_late_as_possible'}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {'asap', 'as_soon_as_possible'}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# Build pass manager
pm3 = PassManager()
pm3.append(_unroll3q)
pm3.append(_reset + _meas)
if coupling_map or initial_layout:
pm3.append(_given_layout)
pm3.append(_choose_layout_1, condition=_choose_layout_condition)
pm3.append(_choose_layout_2, condition=_choose_layout_condition)
pm3.append(_embed)
pm3.append(_swap_check)
pm3.append(_swap, condition=_swap_condition)
pm3.append(_unroll)
pm3.append(_depth_check + _opt + _unroll, do_while=_opt_control)
if coupling_map and not coupling_map.is_symmetric:
pm3.append(_direction_check)
pm3.append(_direction, condition=_direction_condition)
pm3.append(_reset)
if scheduling_method:
pm3.append(_scheduling)
return pm3
def noise_pass_manager(basis_gates=None,
initial_layout=None,
coupling_map=None,
layout_method=None,
translation_method=None,
seed_transpiler=None,
backend=None,
routing_method=None,
backend_properties=None,
transform=False,
readout=True,
alpha=0.5,
next_gates=5,
front=True) -> PassManager:
"""Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and
gate cancellation using commutativity rules and unitary synthesis.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, and device calibration information is available, the
circuit is mapped to the qubits with best readouts and to CX gates with highest fidelity.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation, resynthesis
of two-qubit unitary blocks, and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
backend (BaseBackend)
Returns:
a level 3 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
if basis_gates is None:
if getattr(backend, 'configuration', None):
basis_gates = getattr(backend.configuration(), 'basis_gates', None)
# basis_gates could be None, or a list of basis, e.g. ['u3', 'cx']
if isinstance(basis_gates, list) and all(
isinstance(i, str) for i in basis_gates):
basis_gates = basis_gates
if basis_gates is None:
basis_gates = ['u3', 'cx', 'id']
# basis_gates = ['u3', 'cx', 'id']
backend = backend
if backend is None or backend.configuration().simulator:
if backend_properties is None or coupling_map is None:
raise QiskitError(
"Backend is simulator or not specified, provide backend properties and coupling map."
)
coupling_map = coupling_map
backend_properties = backend_properties
else:
if backend_properties is not None or coupling_map is not None:
warnings.warn(
"A backend was provide, ignoring backend properties and coupling map",
UserWarning)
coupling_map = backend.configuration().coupling_map
backend_properties = backend.properties()
if isinstance(coupling_map, list):
coupling_map = CouplingMap(couplinglist=coupling_map)
initial_layout = initial_layout
layout_method = layout_method or 'dense'
routing_method = routing_method or 'stochastic'
translation_method = translation_method or 'translator'
seed_transpiler = seed_transpiler
# 1. Unroll to 1q or 2q gates
_unroll3q = Unroll3qOrMore()
# 2. Layout on good qubits if calibration info available, otherwise on dense links
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout_1 = CSPLayout(coupling_map, call_limit=10000, time_limit=60)
if layout_method == 'trivial':
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == 'sabre':
_choose_layout_2 = SabreLayout(coupling_map,
max_iterations=4,
seed=seed_transpiler)
elif layout_method == 'chain':
_choose_layout_2 = ChainLayout(coupling_map,
backend_properties,
readout=readout)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=200, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=6)]
elif routing_method == 'sabre':
_swap += [
SabreSwap(coupling_map, heuristic='decay', seed=seed_transpiler)
]
elif routing_method == 'noise_adaptive':
_swap += [
NoiseAdaptiveSwap(coupling_map,
backend_properties,
invert_score=invert_score,
swap_score=swap_score,
readout=readout,
alpha=alpha,
next_gates=next_gates,
front=front)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == 'unroller':
_unroll = [Unroller(basis_gates)]
elif translation_method == 'translator':
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates)
]
elif translation_method == 'synthesis':
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 6. Fix any CX direction mismatch
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 8. Optimize iteratively until no more change in depth. Removes useless gates
# after reset and before measure, commutes gates and optimizes continguous blocks.
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_reset = [RemoveResetInZeroState()]
_meas = [OptimizeSwapBeforeMeasure(), RemoveDiagonalGatesBeforeMeasure()]
_opt = [
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
Optimize1qGates(basis_gates),
CommutativeCancellation(),
]
# Build pass manager
pm3 = PassManager()
pm3.append(_unroll3q)
if transform:
_transform = TransformCxCascade()
pm3.append(_transform)
pm3.append(_reset + _meas)
if coupling_map:
pm3.append(_given_layout)
pm3.append(_choose_layout_1, condition=_choose_layout_condition)
pm3.append(_choose_layout_2, condition=_choose_layout_condition)
pm3.append(_embed)
pm3.append(_swap_check)
pm3.append(_swap, condition=_swap_condition)
pm3.append(_unroll)
pm3.append(_depth_check + _opt + _unroll, do_while=_opt_control)
if coupling_map and not coupling_map.is_symmetric:
pm3.append(_direction_check)
pm3.append(_direction, condition=_direction_condition)
pm3.append(_reset)
return pm3
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
_choose_layout_and_score = [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name='trivial_layout_score')
]
def _choose_layout_condition(property_set):
return not property_set['layout']
# 2. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == 'trivial':
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_improve_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_improve_layout = NoiseAdaptiveLayout(backend_properties)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
def _not_perfect_yet(property_set):
return property_set['trivial_layout_score'] is not None and \
property_set['trivial_layout_score'] != 0
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = Unroll3qOrMore()
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
_unroll = Unroller(basis_gates)
# 7. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGates(basis_gates), CXCancellation()]
# Build pass manager
pm1 = PassManager()
if coupling_map:
pm1.append(_given_layout)
pm1.append(_choose_layout_and_score,
condition=_choose_layout_condition)
pm1.append(_improve_layout, condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_unroll3q)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt, do_while=_opt_control)
return pm1
def level_1_pass_manager(pass_manager_config):
"""
Level 1 pass manager: light optimization by simple adjacent gate collapsing
This pass manager applies the user-given initial layout. If none is given, and a trivial
layout (i-th virtual -> i-th physical) makes the circuit fit the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph, and swaps
are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note: in simulators where coupling_map=None, only the unrolling and optimization
stages are done.
Args:
pass_manager_config (PassManagerConfig)
Returns:
PassManager: a level 1 pass manager.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Use trivial layout if no layout given
_set_initial_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
# 2. Use a better layout on densely connected qubits, if circuit needs swaps
def _not_perfect_yet(property_set):
return property_set['trivial_layout_score'] is not None and \
property_set['trivial_layout_score'] != 0
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Unroll to the basis
_unroll = Unroller(basis_gates)
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [
BarrierBeforeFinalMeasurements(),
Unroll3qOrMore(),
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler),
Decompose(SwapGate)
]
# 6. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 7. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 8. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGates(), CXCancellation()]
pm1 = PassManager()
if coupling_map:
pm1.append(_set_initial_layout)
pm1.append([
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map,
property_name='trivial_layout_score')
],
condition=_choose_layout_condition)
pm1.append(DenseLayout(coupling_map, backend_properties),
condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_unroll)
if coupling_map:
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
if not coupling_map.is_symmetric:
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt, do_while=_opt_control)
return pm1
def level_3_pass_manager(pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and
gate cancellation using commutativity rules and unitary synthesis.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, and device calibration information is available, the
circuit is mapped to the qubits with best readouts and to CX gates with highest fidelity.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation, resynthesis
of two-qubit unitary blocks, and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 3 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "sabre"
routing_method = pass_manager_config.routing_method or "sabre"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints()
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
target = pass_manager_config.target
# 1. Unroll to 1q or 2q gates
_unroll3q = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
min_qubits=3,
),
Unroll3qOrMore(),
]
# 2. Layout on good qubits if calibration info available, otherwise on dense links
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
# layout hasn't been set yet
return not property_set["layout"]
def _csp_not_found_match(property_set):
# If a layout hasn't been set by the time we run csp we need to run layout
if property_set["layout"] is None:
return True
# if CSP layout stopped for any reason other than solution found we need
# to run layout since CSP didn't converge.
if (
property_set["CSPLayout_stop_reason"] is not None
and property_set["CSPLayout_stop_reason"] != "solution found"
):
return True
return False
# 2a. If layout method is not set, first try a trivial layout
_choose_layout_0 = (
[]
if pass_manager_config.layout_method
else [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
)
# 2b. If trivial layout wasn't perfect (ie no swaps are needed) then try
# using CSP layout to find a perfect layout
_choose_layout_1 = (
[]
if pass_manager_config.layout_method
else CSPLayout(coupling_map, call_limit=10000, time_limit=60, seed=seed_transpiler)
)
def _trivial_not_perfect(property_set):
# Verify that a trivial layout is perfect. If trivial_layout_score > 0
# the layout is not perfect. The layout property set is unconditionally
# set by trivial layout so we clear that before running CSP
if property_set["trivial_layout_score"] is not None:
if property_set["trivial_layout_score"] != 0:
return True
return False
# 2c. if CSP didn't converge on a solution use layout_method (dense).
if layout_method == "trivial":
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == "dense":
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == "noise_adaptive":
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_choose_layout_2 = SabreLayout(coupling_map, max_iterations=4, seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [FullAncillaAllocation(coupling_map), EnlargeWithAncilla(), ApplyLayout()]
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [StochasticSwap(coupling_map, trials=200, seed=seed_transpiler)]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=6)]
elif routing_method == "sabre":
_swap += [SabreSwap(coupling_map, heuristic="decay", seed=seed_transpiler)]
elif routing_method == "none":
_swap += [
Error(
msg=(
"No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}"
),
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
method=unitary_synthesis_method,
),
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates, target),
]
elif translation_method == "synthesis":
_unroll = [
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
min_qubits=3,
),
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
),
]
else:
raise TranspilerError("Invalid translation method %s." % translation_method)
# 6. Fix any CX direction mismatch
_direction_check = [CheckGateDirection(coupling_map, target)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map, target)]
# 8. Optimize iteratively until no more change in depth. Removes useless gates
# after reset and before measure, commutes gates and optimizes contiguous blocks.
_depth_check = [Depth(), FixedPoint("depth")]
def _opt_control(property_set):
return not property_set["depth_fixed_point"]
_reset = [RemoveResetInZeroState()]
_meas = [OptimizeSwapBeforeMeasure(), RemoveDiagonalGatesBeforeMeasure()]
_opt = [
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
),
Optimize1qGatesDecomposition(basis_gates),
CommutativeCancellation(),
]
# 9. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_time_unit_setup = [ContainsInstruction("delay")]
_time_unit_conversion = [TimeUnitConversion(instruction_durations)]
def _contains_delay(property_set):
return property_set["contains_delay"]
_scheduling = []
if scheduling_method:
_scheduling += _time_unit_conversion
if scheduling_method in {"alap", "as_late_as_possible"}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {"asap", "as_soon_as_possible"}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." % scheduling_method)
# 10. Call measure alignment. Should come after scheduling.
if (
timing_constraints.granularity != 1
or timing_constraints.min_length != 1
or timing_constraints.acquire_alignment != 1
):
_alignments = [
ValidatePulseGates(
granularity=timing_constraints.granularity, min_length=timing_constraints.min_length
),
AlignMeasures(alignment=timing_constraints.acquire_alignment),
]
else:
_alignments = []
# Build pass manager
pm3 = PassManager()
pm3.append(_unroll3q)
pm3.append(_reset + _meas)
if coupling_map or initial_layout:
pm3.append(_given_layout)
pm3.append(_choose_layout_0, condition=_choose_layout_condition)
pm3.append(_choose_layout_1, condition=_trivial_not_perfect)
pm3.append(_choose_layout_2, condition=_csp_not_found_match)
pm3.append(_embed)
pm3.append(_swap_check)
pm3.append(_swap, condition=_swap_condition)
pm3.append(_unroll)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None and target.get_non_global_operation_names(strict_direction=True)
):
pm3.append(_direction_check)
pm3.append(_direction, condition=_direction_condition)
pm3.append(_reset)
# For transpiling to a target we need to run GateDirection in the
# optimization loop to correct for incorrect directions that might be
# inserted by UnitarySynthesis which is direction aware but only via
# the coupling map which with a target doesn't give a full picture
if target is not None:
pm3.append(_depth_check + _opt + _unroll + _direction, do_while=_opt_control)
else:
pm3.append(_depth_check + _opt + _unroll, do_while=_opt_control)
else:
pm3.append(_reset)
pm3.append(_depth_check + _opt + _unroll, do_while=_opt_control)
if inst_map and inst_map.has_custom_gate():
pm3.append(PulseGates(inst_map=inst_map))
if scheduling_method:
pm3.append(_scheduling)
elif instruction_durations:
pm3.append(_time_unit_setup)
pm3.append(_time_unit_conversion, condition=_contains_delay)
pm3.append(_alignments)
return pm3
def level_3_pass_manager(pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and
gate cancellation using commutativity rules and unitary synthesis.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, and device calibration information is available, the
circuit is mapped to the qubits with best readouts and to CX gates with highest fidelity.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation, resynthesis
of two-qubit unitary blocks, and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 3 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Unroll to the basis first, to prepare for noise-adaptive layout
_unroll = Unroller(basis_gates)
# 2. Layout on good qubits if calibration info available, otherwise on dense links
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout_1 = CSPLayout(coupling_map, call_limit=10000, time_limit=60)
if layout_method == 'trivial':
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [FullAncillaAllocation(coupling_map), EnlargeWithAncilla(), ApplyLayout()]
# 4. Unroll to 1q or 2q gates, swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements(), Unroll3qOrMore()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [StochasticSwap(coupling_map, trials=200, seed=seed_transpiler)]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=6)]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. 1q rotation merge and commutative cancellation iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [RemoveResetInZeroState(),
Collect2qBlocks(), ConsolidateBlocks(),
Unroller(basis_gates), # unroll unitaries
Optimize1qGates(), CommutativeCancellation(),
OptimizeSwapBeforeMeasure(), RemoveDiagonalGatesBeforeMeasure()]
# 6. Fix any CX direction mismatch
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# Build pass manager
pm3 = PassManager()
pm3.append(_unroll)
if coupling_map:
pm3.append(_given_layout)
pm3.append(_choose_layout_1, condition=_choose_layout_condition)
pm3.append(_choose_layout_2, condition=_choose_layout_condition)
pm3.append(_embed)
pm3.append(_swap_check)
pm3.append(_swap, condition=_swap_condition)
pm3.append(_depth_check + _opt, do_while=_opt_control)
if coupling_map and not coupling_map.is_symmetric:
pm3.append(_direction_check)
pm3.append(_direction, condition=_direction_condition)
return pm3
def level_1_pass_manager(pass_manager_config: PassManagerConfig) -> StagedPassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints()
target = pass_manager_config.target
# Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set["layout"]
def _trivial_not_perfect(property_set):
# Verify that a trivial layout is perfect. If trivial_layout_score > 0
# the layout is not perfect. The layout is unconditionally set by trivial
# layout so we need to clear it before contuing.
if (
property_set["trivial_layout_score"] is not None
and property_set["trivial_layout_score"] != 0
):
return True
return False
# Use a better layout on densely connected qubits, if circuit needs swaps
def _vf2_match_not_found(property_set):
# If a layout hasn't been set by the time we run vf2 layout we need to
# run layout
if property_set["layout"] is None:
return True
# if VF2 layout stopped for any reason other than solution found we need
# to run layout since VF2 didn't converge.
if (
property_set["VF2Layout_stop_reason"] is not None
and property_set["VF2Layout_stop_reason"] is not VF2LayoutStopReason.SOLUTION_FOUND
):
return True
return False
_choose_layout_0 = (
[]
if pass_manager_config.layout_method
else [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
)
_choose_layout_1 = (
[]
if pass_manager_config.layout_method
else VF2Layout(
coupling_map,
seed=seed_transpiler,
call_limit=int(5e4), # Set call limit to ~100ms with retworkx 0.10.2
properties=backend_properties,
target=target,
)
)
if layout_method == "trivial":
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_improve_layout = DenseLayout(coupling_map, backend_properties, target=target)
elif layout_method == "noise_adaptive":
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_improve_layout = SabreLayout(coupling_map, max_iterations=2, seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
toqm_pass = False
if routing_method == "basic":
routing_pass = BasicSwap(coupling_map)
elif routing_method == "stochastic":
routing_pass = StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
elif routing_method == "lookahead":
routing_pass = LookaheadSwap(coupling_map, search_depth=4, search_width=4)
elif routing_method == "sabre":
routing_pass = SabreSwap(coupling_map, heuristic="lookahead", seed=seed_transpiler)
elif routing_method == "toqm":
HAS_TOQM.require_now("TOQM-based routing")
from qiskit_toqm import ToqmSwap, ToqmStrategyO1, latencies_from_target
if initial_layout:
raise TranspilerError("Initial layouts are not supported with TOQM-based routing.")
toqm_pass = True
# Note: BarrierBeforeFinalMeasurements is skipped intentionally since ToqmSwap
# does not yet support barriers.
routing_pass = ToqmSwap(
coupling_map,
strategy=ToqmStrategyO1(
latencies_from_target(
coupling_map, instruction_durations, basis_gates, backend_properties, target
)
),
)
elif routing_method == "none":
routing_pass = Error(
msg="No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}",
action="raise",
)
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# Build optimization loop: merge 1q rotations and cancel CNOT gates iteratively
# until no more change in depth
_depth_check = [Depth(), FixedPoint("depth")]
_size_check = [Size(), FixedPoint("size")]
def _opt_control(property_set):
return (not property_set["depth_fixed_point"]) or (not property_set["size_fixed_point"])
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
unroll_3q = None
# Build full pass manager
if coupling_map or initial_layout:
unroll_3q = common.generate_unroll_3q(
target,
basis_gates,
approximation_degree,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
layout = PassManager()
layout.append(_given_layout)
layout.append(_choose_layout_0, condition=_choose_layout_condition)
layout.append(_choose_layout_1, condition=_trivial_not_perfect)
layout.append(_improve_layout, condition=_vf2_match_not_found)
layout += common.generate_embed_passmanager(coupling_map)
vf2_call_limit = None
if pass_manager_config.layout_method is None and pass_manager_config.initial_layout is None:
vf2_call_limit = int(5e4) # Set call limit to ~100ms with retworkx 0.10.2
routing = common.generate_routing_passmanager(
routing_pass,
target,
coupling_map,
vf2_call_limit=vf2_call_limit,
backend_properties=backend_properties,
seed_transpiler=seed_transpiler,
check_trivial=True,
use_barrier_before_measurement=not toqm_pass,
)
else:
layout = None
routing = None
translation = common.generate_translation_passmanager(
target,
basis_gates,
translation_method,
approximation_degree,
coupling_map,
backend_properties,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
pre_routing = None
if toqm_pass:
pre_routing = translation
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None and target.get_non_global_operation_names(strict_direction=True)
):
pre_optimization = common.generate_pre_op_passmanager(target, coupling_map, True)
else:
pre_optimization = common.generate_pre_op_passmanager(remove_reset_in_zero=True)
optimization = PassManager()
unroll = [pass_ for x in translation.passes() for pass_ in x["passes"]]
optimization.append(_depth_check + _size_check)
opt_loop = _opt + unroll + _depth_check + _size_check
optimization.append(opt_loop, do_while=_opt_control)
sched = common.generate_scheduling(
instruction_durations, scheduling_method, timing_constraints, inst_map
)
return StagedPassManager(
init=unroll_3q,
layout=layout,
pre_routing=pre_routing,
routing=routing,
translation=translation,
pre_optimization=pre_optimization,
optimization=optimization,
scheduling=sched,
)
try:
# select least busy available device and execute.
least_busy_device = least_busy(IBMQ.backends(simulator=False))
except:
print("All devices are currently unavailable.")
print("Running on current least busy device: ", least_busy_device)
# making a pass manager to compile the circuits
coupling_map = CouplingMap(least_busy_device.configuration().coupling_map)
print("coupling map: ", coupling_map)
pm = PassManager()
# Use the trivial layout
pm.append(TrivialLayout(coupling_map))
# Extend the the dag/layout with ancillas using the full coupling map
pm.append(FullAncillaAllocation(coupling_map))
pm.append(EnlargeWithAncilla())
# Swap mapper
pm.append(LookaheadSwap(coupling_map))
# Expand swaps
pm.append(Decompose(SwapGate))
# Simplify CXs
pm.append(CXDirection(coupling_map))
# unroll to single qubit gates
def level_0_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 0 pass manager: no explicit optimization other than mapping to backend.
This pass manager applies the user-given initial layout. If none is given, a trivial
layout consisting of mapping the i-th virtual qubit to the i-th physical qubit is used.
Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, extra resets are removed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 0 pass manager.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
seed_transpiler = pass_manager_config.seed_transpiler
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout = TrivialLayout(coupling_map)
# 2. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 3. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = Unroll3qOrMore()
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [
BarrierBeforeFinalMeasurements(),
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
# 5. Unroll to the basis
_unroll = Unroller(basis_gates)
# 6. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 7. Remove zero-state reset
_reset = RemoveResetInZeroState()
# Build pass manager
pm0 = PassManager()
if coupling_map:
pm0.append(_given_layout)
pm0.append(_choose_layout, condition=_choose_layout_condition)
pm0.append(_embed)
pm0.append(_unroll3q)
pm0.append(_swap_check)
pm0.append(_swap, condition=_swap_condition)
pm0.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm0.append(_direction_check)
pm0.append(_direction, condition=_direction_condition)
pm0.append(_reset)
return pm0
def level_2_pass_manager(pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 2 pass manager: medium optimization by initial layout selection and
gate cancellation using commutativity rules.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, qubits are laid out on the most densely connected subset
which also exhibits the best gate fidelities.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation and redundant
reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 2 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints()
# 1. Search for a perfect layout, or choose a dense layout, if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
# layout hasn't been set yet
return not property_set["layout"]
# 1a. If layout_method is not set, first try a trivial layout
_choose_layout_0 = (
[]
if pass_manager_config.layout_method
else [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
)
# 1b. If a trivial layout wasn't perfect (ie no swaps are needed) then try using
# CSP layout to find a perfect layout
_choose_layout_1 = (
[]
if pass_manager_config.layout_method
else CSPLayout(coupling_map, call_limit=1000, time_limit=10, seed=seed_transpiler)
)
def _trivial_not_perfect(property_set):
# Verify that a trivial layout is perfect. If trivial_layout_score > 0
# the layout is not perfect. The layout is unconditionally set by trivial
# layout so we need to clear it before contuing.
if property_set["trivial_layout_score"] is not None:
if property_set["trivial_layout_score"] != 0:
property_set["layout"]._wrapped = None
return True
return False
def _csp_not_found_match(property_set):
# If a layout hasn't been set by the time we run csp we need to run layout
if property_set["layout"] is None:
return True
# if CSP layout stopped for any reason other than solution found we need
# to run layout since CSP didn't converge.
if (
property_set["CSPLayout_stop_reason"] is not None
and property_set["CSPLayout_stop_reason"] != "solution found"
):
return True
return False
# 1c. if CSP layout doesn't converge on a solution use layout_method (dense) to get a layout
if layout_method == "trivial":
_choose_layout_2 = TrivialLayout(coupling_map)
elif layout_method == "dense":
_choose_layout_2 = DenseLayout(coupling_map, backend_properties)
elif layout_method == "noise_adaptive":
_choose_layout_2 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_choose_layout_2 = SabreLayout(coupling_map, max_iterations=2, seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 2. Extend dag/layout with ancillas using the full coupling map
_embed = [FullAncillaAllocation(coupling_map), EnlargeWithAncilla(), ApplyLayout()]
# 3. Unroll to 1q or 2q gates
_unroll3q = Unroll3qOrMore()
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=5, search_width=5)]
elif routing_method == "sabre":
_swap += [SabreSwap(coupling_map, heuristic="decay", seed=seed_transpiler)]
elif routing_method == "none":
_swap += [
Error(
msg="No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}",
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [UnrollCustomDefinitions(sel, basis_gates), BasisTranslator(sel, basis_gates)]
elif translation_method == "synthesis":
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates, approximation_degree=approximation_degree),
]
else:
raise TranspilerError("Invalid translation method %s." % translation_method)
# 6. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map)]
# 7. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 8. 1q rotation merge and commutative cancellation iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint("depth")]
def _opt_control(property_set):
return not property_set["depth_fixed_point"]
_opt = [
Optimize1qGatesDecomposition(basis_gates),
CommutativeCancellation(basis_gates=basis_gates),
]
# 9. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_scheduling = [TimeUnitConversion(instruction_durations)]
if scheduling_method:
if scheduling_method in {"alap", "as_late_as_possible"}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {"asap", "as_soon_as_possible"}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." % scheduling_method)
# 10. Call measure alignment. Should come after scheduling.
_alignments = [
ValidatePulseGates(
granularity=timing_constraints.granularity, min_length=timing_constraints.min_length
),
AlignMeasures(alignment=timing_constraints.acquire_alignment),
]
# Build pass manager
pm2 = PassManager()
if coupling_map or initial_layout:
pm2.append(_given_layout)
pm2.append(_choose_layout_0, condition=_choose_layout_condition)
pm2.append(_choose_layout_1, condition=_trivial_not_perfect)
pm2.append(_choose_layout_2, condition=_csp_not_found_match)
pm2.append(_embed)
pm2.append(_unroll3q)
pm2.append(_swap_check)
pm2.append(_swap, condition=_swap_condition)
pm2.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm2.append(_direction_check)
pm2.append(_direction, condition=_direction_condition)
pm2.append(_reset)
pm2.append(_depth_check + _opt + _unroll, do_while=_opt_control)
pm2.append(_scheduling)
pm2.append(_alignments)
return pm2
def level_3_pass_manager(
pass_manager_config: PassManagerConfig) -> StagedPassManager:
"""Level 3 pass manager: heavy optimization by noise adaptive qubit mapping and
gate cancellation using commutativity rules and unitary synthesis.
This pass manager applies the user-given initial layout. If none is given, a search
for a perfect layout (i.e. one that satisfies all 2-qubit interactions) is conducted.
If no such layout is found, and device calibration information is available, the
circuit is mapped to the qubits with best readouts and to CX gates with highest fidelity.
The pass manager then transforms the circuit to match the coupling constraints.
It is then unrolled to the basis, and any flipped cx directions are fixed.
Finally, optimizations in the form of commutative gate cancellation, resynthesis
of two-qubit unitary blocks, and redundant reset removal are performed.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 3 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "sabre"
routing_method = pass_manager_config.routing_method or "sabre"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints(
)
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
target = pass_manager_config.target
# Layout on good qubits if calibration info available, otherwise on dense links
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
# layout hasn't been set yet
return not property_set["layout"]
def _vf2_match_not_found(property_set):
# If a layout hasn't been set by the time we run vf2 layout we need to
# run layout
if property_set["layout"] is None:
return True
# if VF2 layout stopped for any reason other than solution found we need
# to run layout since VF2 didn't converge.
if (property_set["VF2Layout_stop_reason"] is not None
and property_set["VF2Layout_stop_reason"]
is not VF2LayoutStopReason.SOLUTION_FOUND):
return True
return False
# 2a. If layout method is not set, first try VF2Layout
_choose_layout_0 = ([] if pass_manager_config.layout_method else VF2Layout(
coupling_map,
seed=seed_transpiler,
call_limit=int(3e7), # Set call limit to ~60 sec with retworkx 0.10.2
properties=backend_properties,
target=target,
))
# 2b. if VF2 didn't converge on a solution use layout_method (dense).
if layout_method == "trivial":
_choose_layout_1 = TrivialLayout(coupling_map)
elif layout_method == "dense":
_choose_layout_1 = DenseLayout(coupling_map,
backend_properties,
target=target)
elif layout_method == "noise_adaptive":
_choose_layout_1 = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_choose_layout_1 = SabreLayout(coupling_map,
max_iterations=4,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
toqm_pass = False
if routing_method == "basic":
routing_pass = BasicSwap(coupling_map)
elif routing_method == "stochastic":
routing_pass = StochasticSwap(coupling_map,
trials=200,
seed=seed_transpiler)
elif routing_method == "lookahead":
routing_pass = LookaheadSwap(coupling_map,
search_depth=5,
search_width=6)
elif routing_method == "sabre":
routing_pass = SabreSwap(coupling_map,
heuristic="decay",
seed=seed_transpiler)
elif routing_method == "toqm":
HAS_TOQM.require_now("TOQM-based routing")
from qiskit_toqm import ToqmSwap, ToqmStrategyO3, latencies_from_target
if initial_layout:
raise TranspilerError(
"Initial layouts are not supported with TOQM-based routing.")
toqm_pass = True
# Note: BarrierBeforeFinalMeasurements is skipped intentionally since ToqmSwap
# does not yet support barriers.
routing_pass = ToqmSwap(
coupling_map,
strategy=ToqmStrategyO3(
latencies_from_target(coupling_map, instruction_durations,
basis_gates, backend_properties,
target)),
)
elif routing_method == "none":
routing_pass = Error(
msg=
"No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}",
action="raise",
)
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 8. Optimize iteratively until no more change in depth. Removes useless gates
# after reset and before measure, commutes gates and optimizes contiguous blocks.
_depth_check = [Depth(), FixedPoint("depth")]
_size_check = [Size(), FixedPoint("size")]
def _opt_control(property_set):
return (not property_set["depth_fixed_point"]) or (
not property_set["size_fixed_point"])
_opt = [
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates, target=target),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
target=target,
),
Optimize1qGatesDecomposition(basis_gates),
CommutativeCancellation(),
]
# Build pass manager
init = common.generate_unroll_3q(
target,
basis_gates,
approximation_degree,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
init.append(RemoveResetInZeroState())
init.append(OptimizeSwapBeforeMeasure())
init.append(RemoveDiagonalGatesBeforeMeasure())
if coupling_map or initial_layout:
layout = PassManager()
layout.append(_given_layout)
layout.append(_choose_layout_0, condition=_choose_layout_condition)
layout.append(_choose_layout_1, condition=_vf2_match_not_found)
layout += common.generate_embed_passmanager(coupling_map)
vf2_call_limit = None
if pass_manager_config.layout_method is None and pass_manager_config.initial_layout is None:
vf2_call_limit = int(
3e7) # Set call limit to ~60 sec with retworkx 0.10.2
routing = common.generate_routing_passmanager(
routing_pass,
target,
coupling_map=coupling_map,
vf2_call_limit=vf2_call_limit,
backend_properties=backend_properties,
seed_transpiler=seed_transpiler,
use_barrier_before_measurement=not toqm_pass,
)
else:
layout = None
routing = None
translation = common.generate_translation_passmanager(
target,
basis_gates,
translation_method,
approximation_degree,
coupling_map,
backend_properties,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
pre_routing = None
if toqm_pass:
pre_routing = translation
optimization = PassManager()
unroll = [pass_ for x in translation.passes() for pass_ in x["passes"]]
optimization.append(_depth_check + _size_check)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None
and target.get_non_global_operation_names(strict_direction=True)):
pre_optimization = common.generate_pre_op_passmanager(
target, coupling_map, True)
_direction = [
pass_ for x in common.generate_pre_op_passmanager(
target, coupling_map).passes() for pass_ in x["passes"]
]
# For transpiling to a target we need to run GateDirection in the
# optimization loop to correct for incorrect directions that might be
# inserted by UnitarySynthesis which is direction aware but only via
# the coupling map which with a target doesn't give a full picture
if target is not None:
optimization.append(_opt + unroll + _depth_check + _size_check +
_direction,
do_while=_opt_control)
else:
optimization.append(_opt + unroll + _depth_check + _size_check,
do_while=_opt_control)
else:
pre_optimization = common.generate_pre_op_passmanager(
remove_reset_in_zero=True)
optimization.append(_opt + unroll + _depth_check + _size_check,
do_while=_opt_control)
opt_loop = _depth_check + _opt + unroll
optimization.append(opt_loop, do_while=_opt_control)
sched = common.generate_scheduling(instruction_durations,
scheduling_method, timing_constraints,
inst_map)
return StagedPassManager(
init=init,
layout=layout,
pre_routing=pre_routing,
routing=routing,
translation=translation,
pre_optimization=pre_optimization,
optimization=optimization,
scheduling=sched,
)
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints(
)
target = pass_manager_config.target
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
_choose_layout_and_score = [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
def _choose_layout_condition(property_set):
return not property_set["layout"]
# 2. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
method=unitary_synthesis_method,
min_qubits=3,
plugin_config=unitary_synthesis_plugin_config,
),
Unroll3qOrMore(),
]
# 3. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == "trivial":
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_improve_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == "noise_adaptive":
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_improve_layout = SabreLayout(coupling_map,
max_iterations=2,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
def _not_perfect_yet(property_set):
return (property_set["trivial_layout_score"] is not None
and property_set["trivial_layout_score"] != 0)
# 4. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
elif routing_method == "sabre":
_swap += [
SabreSwap(coupling_map,
heuristic="lookahead",
seed=seed_transpiler)
]
elif routing_method == "none":
_swap += [
Error(
msg=
("No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}"),
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# custom unrolling
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
),
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates, target),
]
elif translation_method == "synthesis":
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# collection
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
min_qubits=3,
),
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 7. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map, target)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map, target)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint("depth")]
def _opt_control(property_set):
return not property_set["depth_fixed_point"]
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
# 10. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_time_unit_setup = [ContainsInstruction("delay")]
_time_unit_conversion = [TimeUnitConversion(instruction_durations)]
def _contains_delay(property_set):
return property_set["contains_delay"]
_scheduling = []
if scheduling_method:
_scheduling += _time_unit_conversion
if scheduling_method in {"alap", "as_late_as_possible"}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {"asap", "as_soon_as_possible"}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# 11. Call measure alignment. Should come after scheduling.
if (timing_constraints.granularity != 1
or timing_constraints.min_length != 1
or timing_constraints.acquire_alignment != 1):
_alignments = [
ValidatePulseGates(granularity=timing_constraints.granularity,
min_length=timing_constraints.min_length),
AlignMeasures(alignment=timing_constraints.acquire_alignment),
]
else:
_alignments = []
# Build pass manager
pm1 = PassManager()
if coupling_map or initial_layout:
pm1.append(_given_layout)
pm1.append(_unroll3q)
pm1.append(_choose_layout_and_score,
condition=_choose_layout_condition)
pm1.append(_improve_layout, condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None
and target.get_non_global_operation_names(strict_direction=True)):
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt + _unroll, do_while=_opt_control)
if inst_map and inst_map.has_custom_gate():
pm1.append(PulseGates(inst_map=inst_map))
if scheduling_method:
pm1.append(_scheduling)
elif instruction_durations:
pm1.append(_time_unit_setup)
pm1.append(_time_unit_conversion, condition=_contains_delay)
pm1.append(_alignments)
return pm1
def level_0_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 0 pass manager: no explicit optimization other than mapping to backend.
This pass manager applies the user-given initial layout. If none is given, a trivial
layout consisting of mapping the i-th virtual qubit to the i-th physical qubit is used.
Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 0 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'trivial'
routing_method = pass_manager_config.routing_method or 'stochastic'
translation_method = pass_manager_config.translation_method or 'translator'
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Choose an initial layout if not set by user (default: trivial layout)
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
if layout_method == 'trivial':
_choose_layout = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_choose_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_choose_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == 'sabre':
_choose_layout = SabreLayout(coupling_map,
max_iterations=1,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 2. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 3. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = Unroll3qOrMore()
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=2, search_width=2)]
elif routing_method == 'sabre':
_swap += [
SabreSwap(coupling_map, heuristic='basic', seed=seed_transpiler)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == 'unroller':
_unroll = [Unroller(basis_gates)]
elif translation_method == 'translator':
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates)
]
elif translation_method == 'synthesis':
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 6. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 7. Schedule the circuit only when scheduling_method is supplied
if scheduling_method:
_scheduling = [TimeUnitAnalysis(instruction_durations)]
if scheduling_method in {'alap', 'as_late_as_possible'}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {'asap', 'as_soon_as_possible'}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# Build pass manager
pm0 = PassManager()
if coupling_map:
pm0.append(_given_layout)
pm0.append(_choose_layout, condition=_choose_layout_condition)
pm0.append(_embed)
pm0.append(_unroll3q)
pm0.append(_swap_check)
pm0.append(_swap, condition=_swap_condition)
pm0.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm0.append(_direction_check)
pm0.append(_direction, condition=_direction_condition)
if scheduling_method:
pm0.append(_scheduling)
return pm0
def run(self, dag):
dag_depth = self.property_set['my depth']
gates = self.properties.gates
return dag
""" To test your passes you can use the fake backend classes. Your solutions will be tested against
Yorktown, Ourense and Melbourne, as well as some internal backends. """
backend = FakeMelbourne()
properties = backend.properties()
coupling_map = backend.configuration().coupling_map
""" You must submit a pass manager which uses at least one pass you have written.
Examples of creating more complex pass managers can be seen in qiskit.transpiler.preset_passmanagers"""
pass_manager = PassManager()
pass_manager.append(TrivialLayout(coupling_map))
pass_manager.append(MyBasicAnalysisPass())
pass_manager.append(MyBasicTransformationPass(properties))
""" This allows us to simulate the noise a real device has, so that you don't have to wait for jobs to complete
on the actual backends."""
noise_model = basic_device_noise_model(properties)
simulator = Aer.get_backend('qasm_simulator')
""" This is the circuit we are going to look at"""
qc = QuantumCircuit(2, 2)
qc.h(1)
qc.measure(0, 0)
circuits = [qc]
result_normal = execute(circuits, simulator,
coupling_map=coupling_map).result().get_counts()
def level_0_pass_manager(transpile_config):
"""
Level 0 pass manager: no explicit optimization other than mapping to backend.
This pass manager applies the user-given initial layout. If none is given, a trivial
layout consisting of mapping the i-th virtual qubit to the i-th physical qubit is used.
Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, extra resets are removed.
Note: in simulators where coupling_map=None, only the unrolling and optimization
stages are done.
Args:
transpile_config (TranspileConfig)
Returns:
PassManager: a level 0 pass manager.
"""
basis_gates = transpile_config.basis_gates
coupling_map = transpile_config.coupling_map
initial_layout = transpile_config.initial_layout
seed_transpiler = transpile_config.seed_transpiler
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
_choose_layout = TrivialLayout(coupling_map)
# 2. Extend dag/layout with ancillas using the full coupling map
_embed = [FullAncillaAllocation(coupling_map), EnlargeWithAncilla()]
# 3. Unroll to the basis
_unroll = Unroller(basis_gates)
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [
BarrierBeforeFinalMeasurements(),
LegacySwap(coupling_map, trials=20, seed=seed_transpiler),
Decompose(SwapGate)
]
# 5. Fix any bad CX directions
# _direction_check = CheckCXDirection(coupling_map) # TODO
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 6. Remove zero-state reset
_reset = RemoveResetInZeroState()
pm0 = PassManager()
if coupling_map:
pm0.append(_given_layout)
pm0.append(_choose_layout, condition=_choose_layout_condition)
pm0.append(_embed)
pm0.append(_unroll)
if coupling_map:
pm0.append(_swap_check)
pm0.append(_swap, condition=_swap_condition)
# pm0.append(_direction_check) # TODO
pm0.append(_direction, condition=_direction_condition)
pm0.append(_reset)
return pm0
def level_0_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 0 pass manager: no explicit optimization other than mapping to backend.
This pass manager applies the user-given initial layout. If none is given, a trivial
layout consisting of mapping the i-th virtual qubit to the i-th physical qubit is used.
Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 0 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "trivial"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints(
)
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
target = pass_manager_config.target
# 1. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
method=unitary_synthesis_method,
min_qubits=3,
plugin_config=unitary_synthesis_plugin_config,
),
Unroll3qOrMore(),
]
# 2. Choose an initial layout if not set by user (default: trivial layout)
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set["layout"]
if layout_method == "trivial":
_choose_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_choose_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == "noise_adaptive":
_choose_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_choose_layout = SabreLayout(coupling_map,
max_iterations=1,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=2, search_width=2)]
elif routing_method == "sabre":
_swap += [
SabreSwap(coupling_map, heuristic="basic", seed=seed_transpiler)
]
elif routing_method == "none":
_swap += [
Error(
msg=
("No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}"),
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 5. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
),
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates, target),
]
elif translation_method == "synthesis":
_unroll = [
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
min_qubits=3,
plugin_config=unitary_synthesis_plugin_config,
),
Unroll3qOrMore(),
Collect2qBlocks(),
Collect1qRuns(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
backend_props=backend_properties,
method=unitary_synthesis_method,
plugin_config=unitary_synthesis_plugin_config,
),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 6. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map, target)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map, target)]
# 7. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_time_unit_setup = [ContainsInstruction("delay")]
_time_unit_conversion = [TimeUnitConversion(instruction_durations)]
def _contains_delay(property_set):
return property_set["contains_delay"]
_scheduling = []
if scheduling_method:
_scheduling += _time_unit_conversion
if scheduling_method in {"alap", "as_late_as_possible"}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {"asap", "as_soon_as_possible"}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# 8. Call measure alignment. Should come after scheduling.
if (timing_constraints.granularity != 1
or timing_constraints.min_length != 1
or timing_constraints.acquire_alignment != 1):
_alignments = [
ValidatePulseGates(granularity=timing_constraints.granularity,
min_length=timing_constraints.min_length),
AlignMeasures(alignment=timing_constraints.acquire_alignment),
]
else:
_alignments = []
# Build pass manager
pm0 = PassManager()
if coupling_map or initial_layout:
pm0.append(_given_layout)
pm0.append(_unroll3q)
pm0.append(_choose_layout, condition=_choose_layout_condition)
pm0.append(_embed)
pm0.append(_swap_check)
pm0.append(_swap, condition=_swap_condition)
pm0.append(_unroll)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None
and target.get_non_global_operation_names(strict_direction=True)):
pm0.append(_direction_check)
pm0.append(_direction, condition=_direction_condition)
pm0.append(_unroll)
if inst_map and inst_map.has_custom_gate():
pm0.append(PulseGates(inst_map=inst_map))
if scheduling_method:
pm0.append(_scheduling)
elif instruction_durations:
pm0.append(_time_unit_setup)
pm0.append(_time_unit_conversion, condition=_contains_delay)
pm0.append(_alignments)
return pm0