os.mkdir(extDir + '/run')
except OSError:
print('Unable to create the "run" directory in "extraction" folder')
try:
os.mkdir(simDir + '/run')
except OSError:
print('Unable to create the "run" directory in "hspice" folder')
if args.mode != 'verilog':
if not os.path.isdir(privateGenDir):
print('Error. Private directory does not exist. ' + \
'Please use only \'verilog\' mode.')
sys.exit(1)
npre, ninv, power_min, error_min = check_search_done()
#print("Number of INV(odd number):")
#ninv=int(input())-1
#print("Number of PRECHARGESW:")
#npre=int(input())
#print("Number of HEADER:")
#nhead=int(input())
print("INV:{0} PreSW:{1}".format(ninv, npre))
ninv = int(ninv)
print(
'#----------------------------------------------------------------------')
print('# Verilog Generation')
print(
'#----------------------------------------------------------------------')
try:
os.mkdir(simDir + '/run')
except OSError:
print('Unable to create the "run" directory in "hspice" folder')
#------------------------------------------------------------------------------
# Initialize the config variables
#------------------------------------------------------------------------------
if args.mode != 'verilog':
if not os.path.isdir(privateGenDir):
print('Error. Private directory does not exist. ' + \
'Please use only \'verilog\' mode.')
sys.exit(1)
temp, power, error, ninv, nhead, hist = check_search_done()
print('Error : ', error)
print('Inv : ', ninv)
print('Header : ', nhead)
print('History : ', hist)
#print("Number of bits:")
#nbit=int(input())
print("INV:{0}\nHEADER:{1}\n".format(ninv, nhead))
print(
'#----------------------------------------------------------------------')
print('# Verilog Generation')
print(
'#----------------------------------------------------------------------')
time.sleep(2)
