def do_unmask(self, args):
"""Unmask single VFAT to data. If no VFAT provided, will unmask all VFATs. USAGE unmask <OH_NUM> <optional VFAT_SLOT> """
arglist = args.split()
if len(arglist) == 1 and isValidOH(arglist[0]):
print writeReg(
getNode('GEM_AMC.OH.OH' + str(arglist[0]) +
'.CONTROL.VFAT.MASK'), 0x00000000)
elif len(arglist) == 2 and isValidOH(arglist[0]) and isValidVFAT(
arglist[1]):
vfat = int(arglist[1])
oh = int(arglist[0])
mask = 0xffffffff ^ (0x1 << vfat)
try:
current_mask = parseInt(
readReg(
getNode('GEM_AMC.OH.OH' + str(oh) +
'.CONTROL.VFAT.MASK')))
except:
print 'Error reading current mask.'
return
new_mask = mask & current_mask
print writeReg(
getNode('GEM_AMC.OH.OH' + str(oh) + '.CONTROL.VFAT.MASK'),
new_mask)
else:
print 'Incorrect usage.'
return
def writeRegister(self, register, value, debug=False):
"""
write value 'value' into register 'register' using remote procedure call
"""
global gRetries
nRetries = 0
#m_node = self.getNode(register)
m_node = getNode(register)
if m_node is None:
print colors.MAGENTA, "NODE %s NOT FOUND" % (register), colors.ENDC
return 0x0
if debug:
print "Trying to write\n"
print m_node.output()
while (nRetries < gMAX_RETRIES):
rsp = writeReg(m_node, value)
if "permission" in rsp:
print colors.MAGENTA, "NO WRITE PERMISSION", colors.ENDC
return
elif "Error" in rsp:
print colors.MAGENTA, "write error encountered (%s), retrying operation (%d,%d)" % (
register, nRetries, gRetries), colors.ENDC
return
elif "0xdeaddead" in rsp:
print colors.MAGENTA, "0xdeaddead found (%s), retrying operation (%d,%d)" % (
register, nRetries, gRetries), colors.ENDC
return
else:
return
def writeRegister(self, register, value, debug=False):
"""
write value 'value' into register 'register' using remote procedure call
"""
global gRetries
nRetries = 0
#m_node = self.getNode(register)
m_node = getNode(register)
if m_node is None:
print colors.MAGENTA,"NODE %s NOT FOUND"%(register),colors.ENDC
return 0x0
if debug:
print "Trying to write\n"
print m_node.output()
while (nRetries < gMAX_RETRIES):
rsp = writeReg(m_node, value)
if "permission" in rsp:
print colors.MAGENTA,"NO WRITE PERMISSION",colors.ENDC
return
elif "Error" in rsp:
print colors.MAGENTA,"write error encountered (%s), retrying operation (%d,%d)"%(register,nRetries,gRetries),colors.ENDC
return
elif "0xdeaddead" in rsp:
print colors.MAGENTA,"0xdeaddead found (%s), retrying operation (%d,%d)"%(register,nRetries,gRetries),colors.ENDC
return
else:
return
def T1On(OH_NUM):
prevent_infiteloop = 0
while parseInt(
readReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) +
'.T1Controller.MONITOR'))) != 1:
print 'MONITOR:', readReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.MONITOR'))
prevent_infiteloop += 1
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.TOGGLE'),
0xffffffff)
if prevent_infiteloop > 10:
printRed(
'T1Controller Error - Will not toggle T1Controller Monitor')
return False
return True
def do_v2a(self, args):
"""Configure recovered clock for OHv2a. USAGE v2a <OH_NUM>"""
arglist = args.split()
if len(arglist) == 1:
if not args.isdigit() or int(args) < 0 or int(args) > 2:
print 'Invalid OH number.'
return
reg = getNode('GEM_AMC.OH.OH' + str(args) +
'.CONTROL.CLOCK.REF_CLK')
if reg is not None:
try:
print writeReg(reg, 1)
except:
print 'Write error.'
return
else:
print 'Error finding clock control register!'
else:
print "Incorrect number of arguments!"
def resetTriggerCounters():
writeReg(getNode('GEM_AMC.TRIGGER.CTRL.CNT_RESET'), 1)
writeReg(getNode('GEM_AMC.TRIGGER.CTRL.CNT_RESET'), 0)
def unmaskVFAT(OH_NUM, vfat_slot):
SBitMask = getNode('GEM_AMC.OH.OH' + str(OH_NUM) +
'.CONTROL.VFAT.SBIT_MASK')
vmask = (0xffffffff) ^ (0x1 << int(vfat_slot))
writeReg(SBitMask, vmask)
return
def setVFATRunMode(OH_NUM, VFAT_SLOT, Silent=False):
if int(OH_NUM) < 0 or int(OH_NUM) > 3 or int(VFAT_SLOT) < 0 or int(
VFAT_SLOT) > 23:
return False
REG_PATH = 'GEM_AMC.OH.OH' + str(OH_NUM) + '.GEB.VFATS.VFAT' + str(
VFAT_SLOT) + '.'
try:
if not Silent:
print writeReg(getNode(REG_PATH + 'ContReg0'), CONTREG0)
print writeReg(getNode(REG_PATH + 'ContReg1'), CONTREG1)
print writeReg(getNode(REG_PATH + 'ContReg2'), CONTREG2)
print writeReg(getNode(REG_PATH + 'ContReg3'), CONTREG3)
print writeReg(getNode(REG_PATH + 'IPreampIn'), IPREAMPIN)
print writeReg(getNode(REG_PATH + 'IPreampFeed'), IPREAMPFEED)
print writeReg(getNode(REG_PATH + 'IPreampOut'), IPREAMPOUT)
print writeReg(getNode(REG_PATH + 'IShaper'), ISHAPER)
print writeReg(getNode(REG_PATH + 'IShaperFeed'), ISHAPERFEED)
print writeReg(getNode(REG_PATH + 'IComp'), ICOMP)
print writeReg(getNode(REG_PATH + 'VThreshold1'), VTHRESHOLD1)
print writeReg(getNode(REG_PATH + 'VCal'), VCAL)
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.CONTROL.TRIGGER'), 1)
else:
writeReg(getNode(REG_PATH + 'ContReg0'), CONTREG0)
writeReg(getNode(REG_PATH + 'ContReg1'), CONTREG1)
writeReg(getNode(REG_PATH + 'ContReg2'), CONTREG2)
writeReg(getNode(REG_PATH + 'ContReg3'), CONTREG3)
writeReg(getNode(REG_PATH + 'IPreampIn'), IPREAMPIN)
writeReg(getNode(REG_PATH + 'IPreampFeed'), IPREAMPFEED)
writeReg(getNode(REG_PATH + 'IPreampOut'), IPREAMPOUT)
writeReg(getNode(REG_PATH + 'IShaper'), ISHAPER)
writeReg(getNode(REG_PATH + 'IShaperFeed'), ISHAPERFEED)
writeReg(getNode(REG_PATH + 'IComp'), ICOMP)
writeReg(getNode(REG_PATH + 'VThreshold1'), VTHRESHOLD1)
writeReg(getNode(REG_PATH + 'VCal'), VCAL)
writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.CONTROL.TRIGGER'), 1)
return True
except:
return False
def activateChannel(OH_NUM, vfat_slot, channel):
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.GEB.VFATS.VFAT' +
str(vfat_slot) + '.VFATChannels.ChanReg' + str(channel)), 64)
def clearChannel(OH_NUM, vfat_slot, channel):
writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.GEB.VFATS.VFAT' +
str(vfat_slot) + '.VFATChannels.ChanReg' + str(channel)), 0)
def configureT1(OH_NUM, MODE, TYPE, INTERVAL, NUMBER, Silent=False):
if not Silent:
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.MODE'),
MODE)
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.TYPE'),
TYPE)
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.INTERVAL'),
INTERVAL)
print writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.NUMBER'),
NUMBER)
else:
writeReg(getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.MODE'),
MODE)
writeReg(getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.TYPE'),
TYPE)
writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.INTERVAL'),
INTERVAL)
writeReg(
getNode('GEM_AMC.OH.OH' + str(OH_NUM) + '.T1Controller.NUMBER'),
NUMBER)