def run_cycle_write_test():
board_obj = rbd.rfsoc_board(portname)
board_obj.board_driver.open_board()
board_obj.board_driver.select_channel(0)
board_obj.board_driver.set_run_cycles(0xAA)
board_obj.board_driver.close_board()
def dac_sawtooth_test():
#reps = 5000000000/2 #about 10 seconds
reps = 16
#Create a new high level board object and some channels
board_obj = rbd.rfsoc_board(portname)
#locking_filename = "test_waveforms\\tdcsq.txt"
locking_filename = ""
#waveform_filename = "test_waveforms\\testw2.txt"
waveform_filename = "C:\james\RFSoC_Controller_V2\python_source\\test_waveforms\\testw2.txt"
c0 = rbd.rfsoc_channel("DAC", 0, 0, 1, 8 + 0, 32, 4, reps, 1,
waveform_filename, locking_filename, 0, 0)
c1 = rbd.rfsoc_channel("DAC", 1, 0, 1, 8 + 0.25, 32, 4, reps, 1,
waveform_filename, locking_filename, 0, 0)
c2 = rbd.rfsoc_channel("DAC", 2, 0, 1, 8 + 0.5, 32, 4, reps, 1,
waveform_filename, locking_filename, 0, 0)
c3 = rbd.rfsoc_channel("DAC", 3, 0, 1, 8 + 0.75, 32, 4, reps, 1,
waveform_filename, locking_filename, 0, 0)
c4 = rbd.rfsoc_channel("DAC", 4, 0, 1, 8 + 1, 32, 4, reps, 1,
waveform_filename, locking_filename, 0, 0)
board_obj.channel_list.append(c0)
board_obj.channel_list.append(c1)
board_obj.channel_list.append(c2)
board_obj.channel_list.append(c3)
board_obj.channel_list.append(c4)
#wp.plot_dac_waveforms(board_obj.channel_list)
#Check the status of the clocks
board_obj.board_driver.open_board()
if (board_obj.board_driver.reset_fabric()):
raise RuntimeError("Error resetting FPGA fabric")
dac_status, adc_status = board_obj.board_driver.check_clocks()
board_obj.board_driver.close_board()
if (dac_status):
raise RuntimeError(
"Error, the DAC RF clock for the FPGA was not detected, cannot upload waveforms without an RF clock present"
)
#Configure the board
if (board_obj.configure_all_channels()):
raise RuntimeError("Error, could not configure channels for DAC test")
#Trigger the board once
if (board_obj.trigger()):
raise RuntimeError("Error triggering board")
#if(board_obj.trigger()):
#raise RuntimeError("Error triggering board")
return 0
def auto_detect(port_list, use_dummy_mode, org_port):
print("Auto-detecting port...")
for p in port_list:
if (p != org_port):
board = rbd.rfsoc_board(p, use_dummy_mode)
if (board.is_connected):
rbd.save_rfsoc_board(board)
print("Success! Auto-detected port was " + p)
return 1
print("Error, unable to communicate with board")
return 0
import rfsoc_board_driver as rbd
portname = "COM15"
board_obj = rbd.rfsoc_board(portname)
scale = 0.5
#generate our test waveform for a single pulse
wave_single_pulse = [round(rbd.DAC_MAX_VALUE * scale)] * 8 + [0] * 8 + [0] * 64
single_pulse_cycles = round(len(wave_single_pulse) / 16)
#Set up our test channel
chan = rbd.rfsoc_channel("DAC", 4, 0, 0, 0, 0, 8, 1, 1, "", "", 0, 0)
chan.waveform_samples = wave_single_pulse
chan.run_cycles = single_pulse_cycles
#Add the test channel to the board object
board_obj.channel_list = [chan]
#Configure the board
if (board_obj.configure_all_channels()):
raise RuntimeError("Error, could not configure channels for amp test")
print("Press any key to trigger board for single pulse test")
dummy = input()
#Trigger the board once
if (board_obj.trigger()):
raise RuntimeError("Error triggering board")
use_dummy_mode = sys.argv[2]
port_list = rbd.get_port_list()
if (use_dummy_mode == 0):
if portname not in port_list:
#rbd.print_port_list()
print("Invalid port name: " + portname +
", system was unable to locate port")
skip = 1
if not skip: #If we should at least try the user's port
print("\n\n***** Initializing FPGA on port: " + portname + " *****\n")
#Create the object
board = rbd.rfsoc_board(portname, use_dummy_mode)
if not board.is_connected:
is_c = auto_detect(port_list, use_dummy_mode, portname)
else:
#Save it to the database
rbd.save_rfsoc_board(board)
is_c = 1
else:
is_c = auto_detect(port_list, use_dummy_mode, portname)
#If we successfully connected to the board
if (is_c):
board = rbd.load_rfsoc_board()
board.board_driver.open_board()