def init(outputFile):

    sst.setStatisticLoadLevel(9)

    sst.setStatisticOutput("sst.statOutputCSV")
    sst.setStatisticOutputOptions({"filepath": outputFile, "separator": ", "})

    sst.enableStatisticForComponentType("firefly.nic", 'mem_num_stores', {
        "type": "sst.AccumulatorStatistic",
        "rate": "0ns"
    })
    sst.enableStatisticForComponentType("firefly.nic", 'mem_num_loads', {
        "type": "sst.AccumulatorStatistic",
        "rate": "0ns"
    })

    sst.enableStatisticForComponentType(
        "firefly.nic", 'mem_addrs', {
            "type": "sst.HistogramStatistic",
            "rate": "0ns",
            "binwidth": "4096",
            "numbins": "512"
        })
Esempio n. 2
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    link_directory_network.connect(
        (dirNIC, "port", "100ps"),
        (comp_network, "port" + str(portid), "100ps"))

    link_directory_memory_network = sst.Link("link_directory_memory_" + str(x))
    link_directory_memory_network.connect(
        (dirtoM, "port", "400ps"), (comp_memory, "direct_link", "400ps"))

# Enable statistics
sst.setStatisticLoadLevel(7)
sst.setStatisticOutput("sst.statOutputConsole")

sst.enableStatisticForComponentType(
    "memHierarchy.Cache", "hist_reads_log2", {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",
        "numbins": "30",
        "binwidth": "1",
        "includeoutofbounds": "1"
    })

sst.enableStatisticForComponentType(
    "memHierarchy.Cache", "hist_writes_log2", {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",
        "numbins": "30",
        "binwidth": "1",
        "includeoutofbounds": "1"
    })

sst.enableStatisticForComponentType(
    "memHierarchy.Cache", "hist_age_log2", {
Esempio n. 3
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print('call topo.setEndPointFunc()')
topo.setEndPointFunc(setNode)
print('call topo.build()')
topo.build()

# Enable SST Statistics Outputs for this simulation
#sst.setStatisticLoadLevel(16)
#sst.setStatisticOutput("sst.statOutputCSV");
#sst.setStatisticOutputOptions({
#    "filepath" : "stats.out",
#    "separator" : ", "
#})

sst.enableStatisticForComponentType("memHierarchy.spmvCpu", 'FamGetLatency', {
    "type": "sst.AccumulatorStatistic",
    "rate": "0ns"
})
sst.enableStatisticForComponentType("memHierarchy.spmvCpu", 'RespLatency', {
    "type": "sst.AccumulatorStatistic",
    "rate": "0ns"
})
sst.enableStatisticForComponentType("memHierarchy.ShmemNic", 'FamGetLatency', {
    "type": "sst.AccumulatorStatistic",
    "rate": "0ns"
})
sst.enableStatisticForComponentType("memHierarchy.ShmemNic",
                                    'hostToNicLatency', {
                                        "type": "sst.AccumulatorStatistic",
                                        "rate": "0ns"
                                    })
#sst.enableStatisticForComponentType("memHierarchy.DirectoryController",'directory_cache_hits', {"type":"sst.AccumulatorStatistic","rate":"0ns"})
    for x in range(cores):
        arielL1Link = sst.Link("cpu_cache_link_%d"%x)
        arielL1Link.connect((ariel, "cache_link_%d"%x, busLat), (sieve, "cpu_link_%d"%x, busLat))


doCores(corecount)


statoutputs = dict([(1,"sst.statOutputConsole"), (2,"sst.statOutputCSV"), (3,"sst.statOutputTXT")])

sst.setStatisticLoadLevel(7)
sst.setStatisticOutput(statoutputs[2])
sst.enableStatisticForComponentType("memHierarchy.Sieve",
                                    "histogram_reads",
                                        {"type":"sst.HistogramStatistic",
                                         "minvalue" : "0",       # The beginning virtual address to track
                                         "numbins"  : "4000000", # The ending virtual address relative to the beginning address
                                         "binwidth" : "4096"
                                         #"rate" : "100ns"
                                         })
sst.enableStatisticForComponentType("memHierarchy.Sieve",
                                    "histogram_writes",
                                        {"type":"sst.HistogramStatistic",
                                         "minvalue" : "0",
                                         "numbins"  : "4000000", 
                                         "binwidth" : "4096"
                                         })


print "done configuring SST"

Esempio n. 5
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                            (sieve, "cpu_link_%d" % x, busLat))


doCores(corecount)

statoutputs = dict([(1, "sst.statOutputConsole"), (2, "sst.statOutputCSV"),
                    (3, "sst.statOutputTXT")])

sst.setStatisticLoadLevel(7)
sst.setStatisticOutput(statoutputs[2])
sst.enableStatisticForComponentType(
    "memHierarchy.Sieve",
    "histogram_reads",
    {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",  # The beginning virtual address to track
        "numbins":
        "4000000",  # The ending virtual address relative to the beginning address
        "binwidth": "4096"
        #"rate" : "100ns"
    })
sst.enableStatisticForComponentType(
    "memHierarchy.Sieve", "histogram_writes", {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",
        "numbins": "4000000",
        "binwidth": "4096"
    })

print "done configuring SST"
Esempio n. 6
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      "associativity": 8,
      "cache_line_size": 64
})

comp_sieve.addParams(sieveProfilerParams)

link_cpu_sieve_link = sst.Link("link_cpu_sieve_link")
link_cpu_sieve_link.connect( (comp_cpu, "cache_link", "1000ps"), (comp_sieve, "cpu_link_0", "1000ps") )

statoutputs = dict([(1,"sst.statOutputConsole"), (2,"sst.statOutputCSV"), (3,"sst.statOutputTXT")])

sst.setStatisticLoadLevel(7)
sst.setStatisticOutput(statoutputs[2])
sst.enableStatisticForComponentType("memHierarchy.Sieve",
                                    "histogram_reads",
                                        {"type":"sst.HistogramStatistic",
                                         "minvalue" : "0",
                                         "numbins"  : "6", 
                                         "binwidth" : "4096",
                                         "addr_cutoff" : "16GiB"
                                         #"rate" : "100ns"
                                         })
sst.enableStatisticForComponentType("memHierarchy.Sieve",
                                    "histogram_writes",
                                        {"type":"sst.HistogramStatistic",
                                         "minvalue" : "0",
                                         "numbins"  : "6", 
                                         "binwidth" : "4096",
                                         "addr_cutoff" : "16GiB"
                                         })
Esempio n. 7
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comp_sieve.addParams(sieveProfilerParams)

link_cpu_sieve_link = sst.Link("link_cpu_sieve_link")
link_cpu_sieve_link.connect((comp_cpu, "cache_link", "1000ps"),
                            (comp_sieve, "cpu_link_0", "1000ps"))

statoutputs = dict([(1, "sst.statOutputConsole"), (2, "sst.statOutputCSV"),
                    (3, "sst.statOutputTXT")])

sst.setStatisticLoadLevel(7)
sst.setStatisticOutput(statoutputs[2])
sst.enableStatisticForComponentType(
    "memHierarchy.Sieve",
    "histogram_reads",
    {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",
        "numbins": "6",
        "binwidth": "4096",
        "addr_cutoff": "16GiB"
        #"rate" : "100ns"
    })
sst.enableStatisticForComponentType(
    "memHierarchy.Sieve", "histogram_writes", {
        "type": "sst.HistogramStatistic",
        "minvalue": "0",
        "numbins": "6",
        "binwidth": "4096",
        "addr_cutoff": "16GiB"
    })