def test_capture_while_verifying_bit_collection(self):
origen.dut.arm_debug.switch_to_swd()
# Should be no capture to start
origen.dut.reg('reg1').verify(0)
node = get_last_node()
assert node["attrs"][0] == "RegVerify"
assert node["attrs"][1]["data"] == []
assert node["attrs"][1]["capture"] is None
# Set capture parameters but should not trigger a capture
origen.dut.reg('reg1').set_data(0xFF)
origen.dut.reg('reg1').set_capture()
node = get_last_node()
assert node["attrs"][0] == "RegVerify"
assert node["attrs"][1]["data"] == []
assert node["attrs"][1]["capture"] is None
# Initiate verify - which also ships the capture along with it
origen.dut.reg('reg1').verify()
node = get_last_node()
assert node["attrs"][0] == "RegVerify"
assert node["attrs"][1]["data"] == [255]
cap = node["attrs"][1]["capture"]
assert cap["symbol"] == None
assert cap["cycles"] == None
assert cap["pin_ids"] == None
# Initiate capture - which does not ship the verify along with it
origen.dut.reg('reg1').set_data(0xF)
origen.dut.reg('reg1').capture()
node = get_last_node()
assert node["attrs"][0] == "RegCapture"
assert node["attrs"][1]["data"] == []
cap = node["attrs"][1]["capture"]
assert cap["symbol"] == None
assert cap["cycles"] == None
assert cap["pin_ids"] == None
# Register settings are preserved for the next verify though
origen.dut.reg('reg1').verify()
node = get_last_node()
assert node["attrs"][0] == "RegVerify"
assert node["attrs"][1]["data"] == [15]
cap = node["attrs"][1]["capture"]
assert cap["symbol"] == None
assert cap["cycles"] == None
assert cap["pin_ids"] == None
def test_bit_collection_capture(self):
origen.dut.arm_debug.switch_to_swd()
origen.dut.reg('reg1').capture()
node = get_last_node()
assert node["attrs"][0] == "RegCapture"
cap = node["attrs"][1]["capture"]
assert cap["symbol"] == None
assert cap["cycles"] == None
assert cap["pin_ids"] == None
def test_bit_collection_overlay(self):
o = "test_bit_collection_overlay"
origen.dut.arm_debug.switch_to_swd()
origen.dut.reg('reg1').overlay(o)
node = get_last_node()
assert node["attrs"][0] == "RegOverlay"
ovl = node["attrs"][1]["overlay"]
assert ovl["label"] == o
assert ovl["symbol"] == None
assert ovl["cycles"] == None
assert ovl["pin_ids"] == None
def test_capture_while_verifying_bit_collection_with_options(self):
origen.dut.reg('reg1').set_capture(mask=0xF, symbol="F")
origen.dut.reg('reg1').verify(0x1, mask=0xFF)
node = get_last_node()
assert node["attrs"][0] == "RegVerify"
assert node["attrs"][1]["data"] == [1]
assert node["attrs"][1]["bit_enable"] == [0xFF]
cap = node["attrs"][1]["capture"]
assert cap["symbol"] == "F"
assert cap["enables"] == [0xF]
assert cap["cycles"] == None
assert cap["pin_ids"] == None
def assert_node(self,
symbol=None,
cycles=None,
enables=None,
pin_ids=None):
node = get_last_node()
assert node['attrs'][0] == 'Capture'
assert node['attrs'][1][0]['symbol'] == symbol
assert node['attrs'][1][0]['cycles'] == cycles
assert node['attrs'][1][0]['enables'] == enables
assert node['attrs'][1][0]['pin_ids'] == pin_ids
assert len(node['children']) == 0
def assert_overlay_node(self,
overlay,
symbol=None,
cycles=None,
enables=None,
pin_ids=None):
node = get_last_node()
assert node['attrs'][0] == 'Overlay'
assert node['attrs'][1][0]['label'] == overlay
assert node['attrs'][1][0]['symbol'] == symbol
assert node['attrs'][1][0]['cycles'] == cycles
assert node['attrs'][1][0]['enables'] == enables
assert node['attrs'][1][0]['pin_ids'] == pin_ids
assert len(node['children']) == 0