def _or(operand : int) -> int:
result = Registers.a | getattr(Registers, operand)
if result & 0xff == 0x0:
Registers.set_z_flag()
else:
Registers.reset_z_flag()
Registers.reset_c_flag()
Registers.reset_n_flag()
Registers.reset_h_flag()
Registers.a = result & 0xff
return 4
def ccf() -> int:
if Registers.is_c_flag():
Registers.reset_c_flag()
else:
Registers.set_c_flag()
Registers.reset_n_flag()
Registers.reset_h_flag()
return 4
def dec_byte(operand: int) -> int:
result = getattr(Registers, operand) - 1
if result & 0xff == 0x0:
Registers.set_z_flag()
else:
Registers.reset_z_flag()
if result & 0xf == 0xf:
Registers.set_h_flag()
else:
Registers.reset_h_flag()
Registers.set_n_flag()
setattr(Registers, operand, result & 0xff)
return 4
def bit(pos: int, operand: int) -> int:
bit = 1 if getattr(Registers, operand) & (1 << pos) else 0
if bit & 0xff == 0x0:
Registers.set_z_flag()
else:
Registers.reset_z_flag()
Registers.reset_n_flag()
Registers.set_h_flag()
return 8
def __init__(self, mmu: MMU):
self.mmu = mmu
self.registers = Registers()
self.interruptManager = InterruptManager(mmu)
self.timer = Timer(mmu, self.interruptManager)
self.stackManager = StackManager(self.registers, self.mmu)
self.instructionPerformer = InstructionPerformer(self)
self.ticks = 0
self.ime = False
self.halted = False
self.stop = False
self.pending_interrupts_before_halt = 0x00
self.last_pc = 0
self.last_instruction = 0
def cp(operand: int):
result = Registers.a - getattr(Registers, operand)
if result & 0xff == 0x0:
Registers.set_z_flag()
else:
Registers.reset_z_flag()
if Registers.a < getattr(Registers, operand):
Registers.set_c_flag()
else:
Registers.reset_c_flag()
if (result & 0xf) > (Registers.a & 0xf):
Registers.set_h_flag()
else:
Registers.reset_h_flag()
Registers.set_n_flag()
def adc(operand : int) -> int:
carry = 1 if Registers.is_c_flag() else 0
result = Registers.a + getattr(Registers, operand) + carry
if result & 0xff == 0x0:
Registers.set_z_flag()
else:
Registers.reset_z_flag()
if result > 0xff:
Registers.set_c_flag()
else:
Registers.reset_c_flag()
if (Registers.a & 0xf) + (getattr(Registers, operand) & 0xf) + carry > 0xf:
Registers.set_h_flag()
else:
Registers.reset_h_flag()
Registers.reset_n_flag()
Registers.a = result & 0xff
return 4