def test_elaborate(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = SimConfig()
self.assertTrue(simif.simulate("sim_output_path", "lib", "modulename", None, config, elaborate_only=True))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
])
self.assertEqual(
read_file(elaborate_args_file).splitlines(),
['-elaborate',
'-nocopyright',
'-licqueue',
'-errormax 10',
'-nowarn WRMNZD',
'-nowarn DLCPTH',
'-nowarn DLCVAR',
'-ncerror EVBBOL',
'-ncerror EVBSTR',
'-ncerror EVBNAT',
'-work work',
'-nclibdirname "%s"' % join(self.output_path, "libraries"),
'-cdslib "%s"' % join(self.output_path, "cds.lib"),
'-log "sim_output_path/irun_elaborate.log"',
'-quiet',
'-access +r',
'-input "@run"',
'-input "@catch {if {#vunit_pkg::__runner__.exit_without_errors == 1} {exit 0} else {exit 42}}"',
'-input "@catch {if {#run_base_pkg.runner.exit_without_errors == \\"TRUE\\"} {exit 0} else {exit 42}}"',
'-top lib.modulename:sv'])
def test_elaborate_fail(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = SimConfig()
self.assertFalse(simif.simulate("sim_output_path", "lib", "modulename", None, config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
])
def test_simulate_hdlvar(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path,
hdlvar="custom_hdlvar")
config = SimConfig()
self.assertTrue(simif.simulate("sim_output_path", "lib", "modulename", None, config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
simulate_args_file = join('sim_output_path', 'irun_simulate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
mock.call([join('prefix', 'irun'), '-f', basename(simulate_args_file)],
cwd=dirname(simulate_args_file)),
])
for args_file in [elaborate_args_file, simulate_args_file]:
args = read_file(args_file).splitlines()
self.assertIn('-hdlvar "custom_hdlvar"', args)
def cfg(
name="", # pylint: disable=too-many-arguments
generics=None,
pre_config=None,
post_check=None,
pli=None,
disable_ieee_warnings=False,
sim_options=None):
"""
Helper method to build configuration hierarchy
"""
return Configuration(name=name,
sim_config=SimConfig(
generics=generics,
pli=pli,
disable_ieee_warnings=disable_ieee_warnings,
options=sim_options),
pre_config=pre_config,
post_check=post_check)
def test_simulate_generics_and_parameters(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = SimConfig(generics={"genstr": "genval",
"genint": 1,
"genbool": True})
self.assertTrue(simif.simulate("sim_output_path", "lib", "modulename", None, config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
simulate_args_file = join('sim_output_path', 'irun_simulate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
mock.call([join('prefix', 'irun'), '-f', basename(simulate_args_file)],
cwd=dirname(simulate_args_file)),
])
for args_file in [elaborate_args_file, simulate_args_file]:
args = read_file(args_file).splitlines()
self.assertIn('-gpg "modulename.genstr => \\"genval\\""', args)
self.assertIn('-gpg "modulename.genint => 1"', args)
self.assertIn('-gpg "modulename.genbool => \\"True\\""', args)
def test_simulate_extra_flags(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = SimConfig(options={"incisive.irun_sim_flags": ["custom", "flags"]})
self.assertTrue(simif.simulate("sim_output_path", "lib", "modulename", None, config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
simulate_args_file = join('sim_output_path', 'irun_simulate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
mock.call([join('prefix', 'irun'), '-f', basename(simulate_args_file)],
cwd=dirname(simulate_args_file)),
])
args = read_file(elaborate_args_file).splitlines()
self.assertIn("custom", args)
self.assertIn("flags", args)
args = read_file(simulate_args_file).splitlines()
self.assertIn("custom", args)
self.assertIn("flags", args)
def test_simulate_gui(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
project = Project()
project.add_library("lib", "lib_path")
write_file("file.vhd", "")
project.add_source_file("file.vhd", "lib", file_type="vhdl")
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path, gui=True)
with mock.patch("vunit.simulator_interface.run_command", autospec=True, return_value=True) as dummy:
simif.compile_project(project)
config = SimConfig()
self.assertTrue(simif.simulate("sim_output_path", "lib", "ent", "arch", config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
simulate_args_file = join('sim_output_path', 'irun_simulate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
mock.call([join('prefix', 'irun'), '-f', basename(simulate_args_file)],
cwd=dirname(simulate_args_file)),
])
self.assertEqual(
read_file(elaborate_args_file).splitlines(),
['-elaborate',
'-nocopyright',
'-licqueue',
'-errormax 10',
'-nowarn WRMNZD',
'-nowarn DLCPTH',
'-nowarn DLCVAR',
'-ncerror EVBBOL',
'-ncerror EVBSTR',
'-ncerror EVBNAT',
'-work work',
'-nclibdirname "%s"' % join(self.output_path, "libraries"),
'-cdslib "%s"' % join(self.output_path, "cds.lib"),
'-log "sim_output_path/irun_elaborate.log"',
'-quiet',
'-reflib "lib_path"',
'-access +rwc',
'-gui',
'-top lib.ent:arch'])
self.assertEqual(
read_file(simulate_args_file).splitlines(),
['-nocopyright',
'-licqueue',
'-errormax 10',
'-nowarn WRMNZD',
'-nowarn DLCPTH',
'-nowarn DLCVAR',
'-ncerror EVBBOL',
'-ncerror EVBSTR',
'-ncerror EVBNAT',
'-work work',
'-nclibdirname "%s"' % join(self.output_path, "libraries"),
'-cdslib "%s"' % join(self.output_path, "cds.lib"),
'-log "sim_output_path/irun_simulate.log"',
'-quiet',
'-reflib "lib_path"',
'-access +rwc',
'-gui',
'-top lib.ent:arch'])
def test_simulate_verilog(self, run_command, find_cds_root_irun, find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
project = Project()
project.add_library("lib", "lib_path")
write_file("file.vhd", "")
project.add_source_file("file.vhd", "lib", file_type="vhdl")
with mock.patch("vunit.simulator_interface.run_command", autospec=True, return_value=True) as dummy:
simif.compile_project(project)
config = SimConfig()
self.assertTrue(simif.simulate("sim_output_path", "lib", "modulename", None, config))
elaborate_args_file = join('sim_output_path', 'irun_elaborate.args')
simulate_args_file = join('sim_output_path', 'irun_simulate.args')
run_command.assert_has_calls([
mock.call([join('prefix', 'irun'), '-f', basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file)),
mock.call([join('prefix', 'irun'), '-f', basename(simulate_args_file)],
cwd=dirname(simulate_args_file)),
])
self.assertEqual(
read_file(elaborate_args_file).splitlines(),
['-elaborate',
'-nocopyright',
'-licqueue',
'-errormax 10',
'-nowarn WRMNZD',
'-nowarn DLCPTH',
'-nowarn DLCVAR',
'-ncerror EVBBOL',
'-ncerror EVBSTR',
'-ncerror EVBNAT',
'-work work',
'-nclibdirname "%s"' % join(self.output_path, "libraries"),
'-cdslib "%s"' % join(self.output_path, "cds.lib"),
'-log "sim_output_path/irun_elaborate.log"',
'-quiet',
'-reflib "lib_path"',
'-access +r',
'-input "@run"',
'-input "@catch {if {#vunit_pkg::__runner__.exit_without_errors == 1} {exit 0} else {exit 42}}"',
'-input "@catch {if {#run_base_pkg.runner.exit_without_errors == \\"TRUE\\"} {exit 0} else {exit 42}}"',
'-top lib.modulename:sv'])
self.assertEqual(
read_file(simulate_args_file).splitlines(),
['-nocopyright',
'-licqueue',
'-errormax 10',
'-nowarn WRMNZD',
'-nowarn DLCPTH',
'-nowarn DLCVAR',
'-ncerror EVBBOL',
'-ncerror EVBSTR',
'-ncerror EVBNAT',
'-work work',
'-nclibdirname "%s"' % join(self.output_path, "libraries"),
'-cdslib "%s"' % join(self.output_path, "cds.lib"),
'-log "sim_output_path/irun_simulate.log"',
'-quiet',
'-reflib "lib_path"',
'-access +r',
'-input "@run"',
'-input "@catch {if {#vunit_pkg::__runner__.exit_without_errors == 1} {exit 0} else {exit 42}}"',
'-input "@catch {if {#run_base_pkg.runner.exit_without_errors == \\"TRUE\\"} {exit 0} else {exit 42}}"',
'-top lib.modulename:sv'])