def test_shift_ts(): no = 2 io = 0 ni = 4 test_vals = [[0, 1, 2, 3], [4, 5, 6, 7]] shifted_test_vals = [[int_to_ignore, int_to_ignore, 0, 1], [2, 3, 4, 5]] shift_amount = 2 in_type = ST_TSeq(no, io, ST_SSeq(ni, ST_Int())) rshift = DefineShift_TS(no, io, ni, shift_amount, in_type.t.t, has_valid=True) tester = fault.Tester(rshift, rshift.CLK) tester.circuit.valid_up = 1 for clk in range(len(test_vals)): tester.print("clk: {}".format(clk)) set_nested_port(tester, tester.circuit.I, test_vals[clk], 1, 0) print_nested_port(tester, tester.circuit.I, 1) tester.print("\n") tester.eval() #for i, val in enumerate(test_vals[i*ni+shift_amount:(i+1)*ni+shift_amount]): print_nested_port(tester, tester.circuit.O, 1) tester.print("\n") expect_nested_port(tester, tester.circuit.O, shifted_test_vals[clk], 1, 0) tester.circuit.valid_down.expect(1) tester.step(2) compile_and_run(tester)
False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False, False ] if __name__ == '__main__': mod = Main() tester = fault.Tester(mod, clock(mod.CLK)) tester.circuit.valid_up = 1 output_counter = 0 for f_clk in range(192 + 118): tester.print('clk: {}\n'.format(f_clk)) if f_clk < 192 and fault_inputs0_valid[f_clk]: fault_helpers.set_nested_port( tester, tester.circuit.hi, fault_inputs0[f_clk], num_nested_space_layers( ST_TSeq(32, 32, ST_SSeq(2, ST_SSeq(1, ST_TSeq(1, 2, ST_Int()))))), 0) tester.print("hi: ") fault_helpers.print_nested_port( tester, tester.circuit.hi, num_nested_space_layers( ST_TSeq(32, 32, ST_SSeq(2, ST_SSeq(1, ST_TSeq(1, 2, ST_Int())))))) tester.print("\n") tester.eval() if f_clk > 118: output_counter += 1 tester.print("O: ") fault_helpers.print_nested_port( tester, tester.circuit.O,
Main = Module_2 fault_inputs0 = json.load(open("/tmp/ae_input_031535-0.json")) fault_inputs0_valid = json.load(open("/tmp/ae_in_valid_031535-1.json")) fault_output = json.load(open("/tmp/ae_output31535-2.json")) fault_output_valid = json.load(open("/tmp/ae_out_valid31535-3.json")) if __name__ == '__main__': mod = Main() tester = fault.Tester(mod, clock(mod.CLK)) tester.circuit.valid_up = 1 output_counter = 0 for f_clk in range(48 + 15): tester.print('clk: {}\n'.format(f_clk)) if f_clk < 48 and fault_inputs0_valid[f_clk]: fault_helpers.set_nested_port( tester, tester.circuit.I, fault_inputs0[f_clk], num_nested_space_layers( ST_TSeq(16, 0, ST_TSeq(1, 2, ST_Int(8, False)))), 0) tester.print("I: ") fault_helpers.print_nested_port( tester, tester.circuit.I, num_nested_space_layers( ST_TSeq(16, 0, ST_TSeq(1, 2, ST_Int(8, False))))) tester.print("\n") tester.eval() if f_clk > 15: output_counter += 1 tester.print("O: ") fault_helpers.print_nested_port( tester, tester.circuit.O, num_nested_space_layers( ST_TSeq(16, 0, ST_TSeq(1, 2, ST_Int(8, False)))))
Main = Module_1 fault_inputs0 = [[0, 1, 2, 3]] fault_inputs0_valid = [True] fault_output = [[1, 0, 0, 0]] fault_output_valid = [True] if __name__ == '__main__': mod = Main() tester = fault.Tester(mod, clock(mod.CLK)) tester.circuit.valid_up = 1 output_counter = 0 for f_clk in range(1 + 4): tester.print('clk: {}\n'.format(f_clk)) if f_clk < 1 and fault_inputs0_valid[f_clk]: fault_helpers.set_nested_port( tester, tester.circuit.I, fault_inputs0[f_clk], num_nested_space_layers(ST_SSeq(4, ST_Int())), 0) tester.print("I: ") fault_helpers.print_nested_port( tester, tester.circuit.I, num_nested_space_layers(ST_SSeq(4, ST_Int()))) tester.print("\n") tester.eval() if f_clk > 4: output_counter += 1 tester.print("O: ") fault_helpers.print_nested_port( tester, tester.circuit.O, num_nested_space_layers(ST_SSeq(4, ST_Bit()))) tester.print("\n") if f_clk >= 4: