def main(filename):
model = aiglib.aiger_init()
aiglib.aiger_open_and_read_from_file(model, filename)
for i in range(model.num_latches):
latch = aiglib.get_ith_latch(model, i)
m = match(regex, latch.name)
if m:
ltype = m.groups()[1][0]
if ltype == "b":
aiglib.aiger_add_bad(model, latch.next, latch.name)
if ltype == "c":
aiglib.aiger_add_constraint(model, latch.next, latch.name)
if ltype == "j":
aiglib.aiger_add_justice(model, 1, [latch.next], latch.name)
if ltype == "f":
aiglib.aiger_add_fairness(model, latch.next, latch.name)
res, string = aiglib.aiger_write_to_string(model,
aiglib.aiger_ascii_mode,
2147483648)
assert res != 0, 'writing failure'
print(string)
def add_counter_to_spec(k):
counter_aig, out_overflow_signal = get_counter_aig(k)
define_shift()
define_counter_new_lits(counter_aig)
for l in counter_aig.splitlines()[3:]: # ignore header and input
tokens = l.split()
if len(tokens) == 1: # output, ignore
continue
if len(tokens) == 2: # latch
old_l, old_next = int(tokens[0]), int(tokens[1])
new_l, new_next = get_new_s_lit(old_l), get_new_s_lit(old_next)
#: :type: aiglib.aiger_symbol
l_symbol = get_add_symbol(new_l)
get_add_symbol(new_next)
l_symbol.next = new_next
elif len(tokens) == 3: # AND gate
old_and, old_rhs0, old_rhs1 = (int(tokens[0]), int(tokens[1]),
int(tokens[2]))
new_and, new_rhs0, new_rhs1 = (get_new_s_lit(old_and),
get_new_s_lit(old_rhs0),
get_new_s_lit(old_rhs1))
#: :type: aiglib.aiger_and
and_symbol = get_add_symbol(new_and)
get_add_symbol(new_rhs0)
get_add_symbol(new_rhs1)
and_symbol.rhs0 = new_rhs0
and_symbol.rhs1 = new_rhs1
# print 'and: old_and, old_rhs0, old_rhs1 -> ' \
# 'new_and, new_rhs0, new_rhs1', \
# old_and, old_rhs0, old_rhs1, \
# new_and, new_rhs0, new_rhs1
else:
assert 0, l
# every literal gets defined above, so now goes
aiglib.aiger_add_bad(spec, get_new_s_lit(out_overflow_signal),
'k-liveness')
def add_counter_to_spec(k):
counter_aig, out_overflow_signal = get_counter_aig(k)
define_shift()
define_counter_new_lits(counter_aig)
for l in counter_aig.splitlines()[3:]: # ignore header and input
tokens = l.split()
if len(tokens) == 1: # output, ignore
continue
if len(tokens) == 2: # latch
old_l, old_next = int(tokens[0]), int(tokens[1])
new_l, new_next = get_new_s_lit(old_l), get_new_s_lit(old_next)
#: :type: aiglib.aiger_symbol
l_symbol = get_add_symbol(new_l)
get_add_symbol(new_next)
l_symbol.next = new_next
elif len(tokens) == 3: # AND gate
old_and, old_rhs0, old_rhs1 = (int(tokens[0]),
int(tokens[1]),
int(tokens[2]))
new_and, new_rhs0, new_rhs1 = (get_new_s_lit(old_and),
get_new_s_lit(old_rhs0),
get_new_s_lit(old_rhs1))
#: :type: aiglib.aiger_and
and_symbol = get_add_symbol(new_and)
get_add_symbol(new_rhs0)
get_add_symbol(new_rhs1)
and_symbol.rhs0 = new_rhs0
and_symbol.rhs1 = new_rhs1
# print 'and: old_and, old_rhs0, old_rhs1 -> ' \
# 'new_and, new_rhs0, new_rhs1', \
# old_and, old_rhs0, old_rhs1, \
# new_and, new_rhs0, new_rhs1
else:
assert 0, l
# every literal gets defined above, so now goes
aiglib.aiger_add_bad(spec, get_new_s_lit(out_overflow_signal), 'k-liveness')
def main(filename):
model = aiglib.aiger_init()
aiglib.aiger_open_and_read_from_file(model, filename)
for i in range(model.num_latches):
latch = aiglib.get_ith_latch(model, i)
m = match(regex, latch.name)
if m:
ltype = m.groups()[1][0]
if ltype == "b":
aiglib.aiger_add_bad(model, latch.next, latch.name)
if ltype == "c":
aiglib.aiger_add_constraint(model, latch.next, latch.name)
if ltype == "j":
aiglib.aiger_add_justice(model, 1, [latch.next], latch.name)
if ltype == "f":
aiglib.aiger_add_fairness(model, latch.next, latch.name)
res, string = aiglib.aiger_write_to_string(model, aiglib.aiger_ascii_mode,
2147483648)
assert res != 0, 'writing failure'
print(string)
