def __init__(self, platform): self.submodules.jesd = AD9154JESD(platform) self.sawgs = [sawg.Channel(width=16, parallelism=2) for i in range(4)] self.submodules += self.sawgs for conv, ch in zip(self.jesd.core.sink.flatten(), self.sawgs): self.sync.jesd += conv.eq(Cat(ch.o))
def __init__(self, platform, sys_crg, jesd_crg, dac): self.submodules.jesd = AD9154JESD(platform, sys_crg, jesd_crg, dac) self.sawgs = [sawg.Channel(width=16, parallelism=4) for i in range(4)] self.submodules += self.sawgs for conv, ch in zip(self.jesd.core.sink.flatten(), self.sawgs): assert len(Cat(ch.o)) == len(conv) self.sync.jesd += conv.eq(Cat(ch.o))
def __init__(self, platform, sys_crg, jesd_crg, dac): # Kintex Ultrascale GTH, speed grade -1C: # CPLL linerate (D=1): 4.0 - 8.5 Gb/s self.submodules.jesd = jesd204_tools.UltrascaleTX( platform, sys_crg, jesd_crg, dac) self.submodules.sawgs = [sawg.Channel(width=16, parallelism=4) for i in range(4)] for conv, ch in zip(self.jesd.core.sink.flatten(), self.sawgs): assert len(Cat(ch.o)) == len(conv) self.sync.jesd += conv.eq(Cat(ch.o))
def __init__(self, platform): self.submodules.jesd = AD9154JESD(platform) self.sawgs = [sawg.Channel(width=16, parallelism=8) for i in range(8)] self.submodules += self.sawgs # for i in range(len(self.sawgs)): # self.sawgs[i].connect_y(self.sawgs[i ^ 1]) for conv, ch in zip( self.jesd.core0.sink.flatten() + self.jesd.core1.sink.flatten(), self.sawgs): self.sync.jesd += conv.eq(Cat(ch.o))