def io_init(self):
# configure spi pins
self.spi = bitbang_spi(self.pins['lmx_le'], self.pins['lmx_data'],
self.pins['lmx_lock'], self.pins['lmx_clk'])
self.gpio = GPIO()
# configure gpio pins
self.gpio.set_output(self.pins['lmx_pow_en'])
self.gpio.set_value(self.pins['lmx_pow_en'], self.gpio.HIGH)
self.gpio.set_output(self.pins['lmx_ce'])
#GPIO.setup(self.pins['lmx_lock'], GPIO.IN)
if self.rf_board:
self.gpio.set_output(self.pins['-5v_en'])
self.gpio.set_value(self.pins['-5v_en'], self.gpio.HIGH)
self.gpio.set_output(self.pins['amp_en'])
# TODO: disable 5V rail until DAC is tested, active low
self.gpio.set_output(self.pins['amp_en'], self.gpio.HIGH)
self.dac_spi = bitbang_spi(self.pins['dac_cs'],
self.pins['dac_data'], None,
self.pins['dac_sck'])
self.set_power_dac(500)
time.sleep(.1)
def __init__(self, gpio):
self.gpio = gpio
# msb first, data read on falling edge of clock
# sync high at least one cycle, then low for entire transactiion
self.spi = bitbang_spi(DAC_CS, DAC_SDI, None, DAC_SCK, rising_data = False)
gpio.set_output(DAC_CLR)
self.dac_cmd(0x07, 0, 1) # enable internal reference
def io_init(self):
# configure spi pins
self.spi = bitbang_spi(self.pins['lmx_le'], self.pins['lmx_data'],
self.pins['lmx_lock'], self.pins['lmx_clk'])
self.gpio = GPIO()
# configure gpio pins
self.gpio.set_output(self.pins['lmx_pow_en'])
self.gpio.set_value(self.pins['lmx_pow_en'], self.gpio.HIGH)
self.gpio.set_output(self.pins['lmx_ce'])
#GPIO.setup(self.pins['lmx_lock'], GPIO.IN)
if self.rf_board:
self.dac_spi = bitbang_spi(self.pins['dac_cs'],
self.pins['dac_data'], None,
self.pins['dac_sck'])
self.set_power_dac(000)
self.gpio.set_output(self.pins['amp_en'])
self.gpio.set_value(self.pins['amp_en'], self.gpio.LOW)
time.sleep(.1)
def io_init(self):
# configure spi pins
self.spi = hwiopy_spi(self.pins['lmx_le'], self.pins['lmx_data'],
self.pins['lmx_lock'], self.pins['lmx_clk'])
# configure gpio pins
GPIO.setup(self.pins['lmx_pow_en'], GPIO.OUT)
GPIO.output(self.pins['lmx_pow_en'], GPIO.HIGH)
GPIO.setup(self.pins['lmx_ce'], GPIO.OUT)
GPIO.setup(self.pins['lmx_lock'], GPIO.IN)
GPIO.setup(self.pins['lmx_lock'], GPIO.IN)
if self.rf_board:
GPIO.setup(self.pins['filta'], GPIO.OUT)
GPIO.setup(self.pins['filtb'], GPIO.OUT)
GPIO.setup(self.pins['-5v_en'], GPIO.OUT)
GPIO.output(self.pins['-5v_en'], GPIO.HIGH)
GPIO.setup(self.pins['amp_en'], GPIO.OUT)
GPIO.output(
self.pins['amp_en'],
GPIO.HIGH) # disable 5V rail until DAC is tested, active low
GPIO.setup(PORT_SEL, GPIO.OUT)
GPIO.output(PORT_SEL, GPIO.HIGH)
self.dac_spi = bitbang_spi(self.pins['dac_cs'],
self.pins['dac_data'], None,
self.pins['dac_sck'])
self.set_power_dac(500)
time.sleep(.1)
import Adafruit_BBIO.GPIO as GPIO
import time
SYNCB = PINS.AD_SYNCB
V3_EN = PINS.PLL_3V3_EN
GPIO.setup(SYNCB, GPIO.OUT)
GPIO.setup(V3_EN, GPIO.OUT)
GPIO.output(V3_EN, GPIO.HIGH)
GPIO.output(SYNCB, GPIO.HIGH)
time.sleep(.5)
spi1 = bitbang_spi(ADC_SPI_CS1, ADC_SPI_MOSI, ADC_SPI_MISO, ADC_SPI_CLK)
spi2 = bitbang_spi(ADC_SPI_CS2, ADC_SPI_MOSI, ADC_SPI_MISO, ADC_SPI_CLK)
spi3 = bitbang_spi(ADC_SPI_CS3, ADC_SPI_MOSI, ADC_SPI_MISO, ADC_SPI_CLK)
spi4 = bitbang_spi(ADC_SPI_CS4, ADC_SPI_MOSI, ADC_SPI_MISO, ADC_SPI_CLK)
ad9864_tristate_miso(spi1)
ad9864_tristate_miso(spi2)
ad9864_tristate_miso(spi3)
ad9864_tristate_miso(spi4)
print("init adc1")
ad9864_init(spi1)
print("init adc2")
ad9864_init(spi2)
def __init__(self, gpio):
self.gpio = gpio
# lsb first, data read on rising edge of clock, en high during entire transaction
# pulse sload on last bit after rising edge
self.spi = bitbang_spi(DELAY_EN, DELAY_SDIN, None, DELAY_SCK, latch = DELAY_SLOAD, enable_low = False)
