コード例 #1
0
def carry_from(Rn, operand, size=32):
    RnBin = BinStr(Rn, size)
    operandBin = BinStr(operand, size)
    if int(RnBin.str, 2) + int(operandBin.str, 2) >= 2**size:
        return 1
    else:
        return 0
コード例 #2
0
def borrow_from(Rn, operand, size=32):
    RnBin = BinStr(Rn, size)
    operandBin = BinStr(operand, size)
    if int(RnBin.str, 2) < int(operandBin.str, 2):
        return 1
    else:
        return 0
コード例 #3
0
def _shift_lsr(shift_operand, post_state):
    global shifter_carry_out
    Rm = get_value(shift_operand[0].strip(','), post_state)
    if check_imm(shift_operand[2]):
        shift_imm = int(shift_operand[2][1:], 16)
        if shift_imm == 0:
            shifter_operand = 0
            shifter_carry_out = BinStr(Rm)[31]
        else:
            shifter_operand = Rm >> shift_imm
            shifter_carry_out = BinStr(Rm)[shift_imm - 1]
        return shifter_operand
    elif check_reg(shift_operand[2]):
        Rs = get_value(shift_operand[2], post_state)
        RsBin = int(BinStr(Rs)[7:0], 2)
        if RsBin == 0:
            shifter_operand = Rm
            shifter_carry_out = post_state[1]['C']
        elif RsBin < 32:
            shifter_operand = Rm >> RsBin
            shifter_carry_out = BinStr(Rm)[RsBin - 1]
        elif RsBin == 32:
            shift_operand = 0
            shifter_carry_out = BinStr(Rm)[31]
        else:
            shifter_operand = 0
            shifter_carry_out = 0
        return shifter_operand
    else:
        print 'shift_lsr ERROR'
        return 0
コード例 #4
0
def _shift_imm(shift_operand, post_state):
    global shifter_carry_out
    print "_shift_imm:",shift_operand
    imm = shift_operand[1:]
    # print imm
    imm_bin = BinStr(int(imm, 16))
    immed_8 = int(imm_bin[7:0], 2)
    print immed_8
    rotate_imm = int(imm_bin[11:8], 2)
    shifter_operand = int(cycle_shift(immed_8, rotate_imm*2), 2)
    print 'shifter_operand:', shifter_operand
    if rotate_imm == 0:
        shifter_carry_out = post_state[1]['C']
    else:
        shifter_carry_out = BinStr(shifter_operand)[31]
    return shifter_operand
コード例 #5
0
def _shift_ror(shift_operand, post_state):
    global shifter_carry_out
    Rm = get_value(shift_operand[0].strip(','), post_state)
    if check_imm(shift_operand[2]):
        shift_imm = int(shift_operand[2][1:], 16)
        if shift_imm == 0:
            shifter_operand = post_state[1]['C'] << 31 | Rm >> 1
            shifter_carry_out = BinStr(Rm)[0]
        else:
            shifter_operand = cycle_shift(Rm, shift_imm)
            shifter_carry_out = BinStr(Rm)[shift_imm - 1]
        return shifter_operand
    elif check_reg(shift_operand[2]):
        Rs = get_value(shift_operand[2], post_state)
        RsBin = int(BinStr(Rs)[4:0], 2)
        if int(BinStr(Rs)[7:0], 2) == 0:
            shifter_operand = Rm
            shifter_carry_out = post_state[1]['C']
        elif RsBin == 0:
            shifter_operand = Rm
            shifter_carry_out = BinStr(Rm)[31]
        else:
            shifter_operand = cycle_shift(Rm, RsBin)
            shifter_carry_out = BinStr(Rm)[RsBin -1]
        return shifter_operand
    else:
        print 'shift_ror ERROR'
        return 0
コード例 #6
0
def smull(asm, post_state):
    # Signed Multiply Long
    # SMULL{<cond>}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
    _asm = get_asm(asm)
    S = 1 if _asm[0][-1].upper() == 'S' else 0
    RdLo = _asm[1].strip(',')
    RdHi = _asm[2].strip(',')
    Rm = get_value(_asm[3].strip(','), post_state)
    Rs = get_value(_asm[4], post_state)

    Rdtmp = BinStr(Rm*Rs, 64)
    # Singed multiplication
    post_state[0][RdHi] = int(Rdtmp[63:33], 2)
    post_state[0][RdLo] = int(Rdtmp[31:0], 2)
    if S:
        handleNZ(Rdtmp, post_state)
コード例 #7
0
def smlal(asm, post_state):
    # Signed Multiply Accumulate Long
    # SMLAL{<cond>}{S} <RdLo>, <RdHi>, <Rm>, <Rs>
    _asm = get_asm(asm)
    S = 1 if _asm[0][-1].upper() == 'S' else 0
    RdLo = _asm[1].strip(',')
    RdHi = _asm[2].strip(',')
    Rm = get_value(_asm[3].strip(','), post_state)
    Rs = get_value(_asm[4], post_state)

    Rdtmp = BinStr(Rm*Rs, 64)
    # Signed multiplication
    post_state[0][RdLo] = int(Rdtmp[31:0], 2) + post_state[0][RdLo]
    post_state[0][RdHi] = int(Rdtmp[63:32], 2) + post_state[0][RdHi] +\
                        carry_from(int(Rdtmp[31:0], 2), post_state[0][RdLo])
    if S:
        handleNZ(Rdtmp, post_state)
コード例 #8
0
def over_flow_from(Rn, opt, operand, size=32):
    # print 'over_flow_from called.'
    if opt == '+':
        RnBin = BinStr(Rn, size)
        operandBin = BinStr(operand, size)
        ResBin = BinStr(Rn + operand, size)
        if RnBin.sf == operandBin.sf and RnBin.sf != ResBin.sf:
            # print 'return + 1'
            return 1
        else:
            return 0
    elif opt == '-':
        RnBin = BinStr(Rn, size)
        operandBin = BinStr(operand, size)
        ResBin = BinStr(Rn - operand, size)
        if RnBin.sf != operandBin.sf and RnBin.sf != ResBin.sf:
            return 1
        else:
            return 0
    else:
        return None
コード例 #9
0
def handleNZ(operand, post_state):
    # print('handleNZ called.')
    alu_out = BinStr(operand) if type(operand) !=BinStr else operand
    post_state[1]['N'] = alu_out[alu_out.size-1]
    post_state[1]['Z'] = 1 if alu_out == 0 else 0
コード例 #10
0
def _shift_rrx(shift_operand, post_state):
    global shifter_carry_out
    Rm = get_value(shift_operand[0].strip(','), post_state)
    shifter_operand = post_state[1]['C'] << 31 | Rm >> 1
    shifter_carry_out = BinStr(Rm)[0]
    return shifter_operand