def test_as(): bv = BitVector(1, 4) assert bv.as_sint() == 1 assert bv.as_uint() == 1 assert int(bv) == 1 assert bool(bv) == True assert bv.bits() == [1, 0, 0, 0] assert bv.as_binary_string() == '0b0001' assert str(bv) == '1' assert repr(bv) == 'BitVector(1, 4)'
def __call__(self, data0=0, data1=0, c=0, bit0=0, bit1=0, bit2=0, clk=0, clk_en=1): ra = self.RegA(data0, clk, clk_en) rb = self.RegB(data1, clk, clk_en) rc = self.RegC(c, clk, clk_en) rd = self.RegD(bit0, clk, clk_en) re = self.RegE(bit1, clk, clk_en) rf = self.RegF(bit2, clk, clk_en) res = ZERO res_p = BITZERO alu_res_p = BITZERO if self._add: add = self._add(ra, rb, rc, rd) if self._alu: res = self._alu(ra, rb, rc, rd) if isinstance(res, tuple): res, alu_res_p = res[0], res[1] lut_out = BITZERO if self._lut: lut_out = self._lut(rd, re, rf) res_p = self.get_flag(ra, rb, rc, rd, res, alu_res_p, lut_out) if not isinstance(res_p, BitVector): assert res_p in {0, 1}, res_p res_p = BitVector(res_p, 1) # if self._cond: # res_p = self._cond(ra, rb, res) # Set internal flags to determine whether debug trigger should be raised # for both the result and the predicate. self.raise_debug_trig = res != self._debug_trig self.raise_debug_trig_p = res_p != self._debug_trig_p return res.as_uint(), res_p.as_uint(), self.get_irq_trigger()